Liquid crystal display device

Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal

Reexamination Certificate

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Details

C349S030000, C349S038000, C345S092000

Reexamination Certificate

active

06738107

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an active matrix type liquid crystal display device and, more particularly, a liquid crystal display device suitable for the display of the moving picture.
2. Description of the Prior Art
An active matrix type liquid crystal display device can prevent cross talk by providing switching elements, which are turned OFF to cut off the signal when they are not selected, to respective pixels and also can exhibit excellent display characteristics better than a simple matrix type liquid crystal display device. In particular, since a liquid crystal display device employing TFTs (Thin Film Transistors) as the switching elements has a high TFT driving capability, it can exhibit excellent display characteristics that are equivalent to the CRT (Cathode Ray Tube). Therefore, in recent years, the active matrix type liquid crystal display device is widely used in the personal computer and other OA (Office Automation) equipment.
Moving pictures are often displayed on a personal computer because of the spread of multimedia. Also, when a liquid crystal display device is employed in a TV receiver set, a high quality moving picture display performance is desired. Therefore, the liquid crystal display device needs to increase a response speed.
In general, the liquid crystal display device has a structure in which the liquid crystal is sealed between two sheets of transparent substrates. Opposing electrodes, color filters, an alignment film, etc. are formed on one surface side of two surfaces (opposing surfaces) of these transparent substrates opposing to each other, while TFTs, pixel electrodes, the alignment film, etc. are formed on the other surface side. In addition, polarizing plates are stuck onto the opposing surface of the transparent substrate and the surface on the opposite side respectively. These two sheets of polarizing plates are arranged such that polarization axes of the polarizing plates can intersect orthogonally with each other, for example. According to this, the liquid crystal display device is set to the mode in which the light is transmitted when no electric field is applied and the light is cut off when the electric field is applied, i.e., the normally white mode. Also, if the polarization axes of two sheets of polarizing plates are positioned in parallel, the liquid crystal display device is set to the normally black mode. In the following explanation, the substrate on which the TFTs, the pixel electrodes, etc. are formed is referred to as a TFT substrate, and the substrate on which the opposing electrodes, the color filters, etc. is referred to as an opposing substrate.
FIG. 1
is a plan view of the TFT substrate showing one pixel of the MVA (Multi-domain Vertical Alignment) system liquid crystal display device in the prior art. This MVA system liquid crystal display device is set forth in detail in Japanese Patent 2947350 Gazette issued to the applicant of this application, for example.
A plurality of gate bus lines
611
are formed in parallel with each other on a display portion of the liquid crystal display device. Also, a plurality of data bus lines
661
are formed on the display portion of the liquid crystal display device to intersect orthogonally with the gate bus lines
611
. Rectangular regions that are partitioned with the gate bus lines
611
and the data bus lines
661
are pixel regions respectively. In addition, storage capacitance bus lines
612
are formed between the gate bus lines
611
in parallel with the gate bus lines
611
.
A pixel electrode
68
and a TFT
69
are formed in the pixel region respectively. The pixel electrode
68
is formed of transparent conductive material such as ITO (Indium-Tin Oxide), or the like. In this example, a plurality of slits
68
a
that are arranged in the oblique direction are provided in the pixel electrode
68
. The so-called alignment division (multi-domain) can be achieved by the slits
68
a
and projections provided on the opposing substrate side.
A silicon film (not shown) acting as an active layer of the TFT
69
is selectively formed over the gate bus lines
611
. A part of the gate bus line
611
acts as a gate electrode of the TFT
69
. Also, a source electrode
663
and a drain electrode
662
are formed on both sides of the silicon film respectively. The source electrode
663
is electrically connected to the pixel electrode
68
, and the drain electrode
662
is electrically connected to the data bus line
661
.
In the liquid crystal display device constructed in this manner, when a scanning pulse is supplied to the gate bus line
611
, the TFT
69
is turned ON and then a display data signal that has been supplied to the gate bus line
611
is loaded onto the pixel electrode
68
. Thus, the direction of liquid crystal molecules contained between the pixel electrode
68
and the opposing electrode is changed in the direction to correspond to the direction of the electric field, and thus the light transmittance is changed. A desired image can be displayed on the liquid crystal display device by controlling the light transmittance of all pixels of the display screen.
In the meanwhile, storage capacitances are formed in parallel with the liquid crystal capacitances in the prior art. In general, the storage capacitance is formed by the storage capacitance bus line
612
, the pixel electrode
68
, and an insulating film formed between them. For the purpose of relaxing the residual phenomenon of the image (so-called sticking), this storage capacitance is set to reduce the DC voltage applied to the liquid crystal smaller than a constant level. More particularly, a magnitude of the feed-through voltage is calculated based on the parasitic capacitance between the gate electrode of the TFT
69
and the pixel electrode
68
, the dielectric constant of the liquid crystal, etc., and then a magnitude of the storage capacitance is set based on this value of the feed-through voltage not to generate defects such as the sticking, etc.
A way of setting the capacitance values used as the design standard of the storage capacitance in the prior art will be explained hereunder.
In the prior art, the capacitance value of the storage capacitance is set such that a value of &Dgr;Vc given in following Eq. (1) becomes less than 0.5 V.
&Dgr;
Vc=|VsB−&Dgr;VsW|
  (1)
In this case, &Dgr;VsB and &Dgr;VsW are given by following Eqs. (2), (3) respectively.
&Dgr;
VsB=&Dgr;Vg Cgs
/(
Cgs+Cs+ClcB
)  (2)
&Dgr;
VsW=&Dgr;Vg Cgs
/(
Cgs+Cs+ClcW
)  (3)
Where &Dgr;VsB and &Dgr;VsW are variation in the pixel voltage respectively when the gate waveform is risen up in the white display and the black display, and are called the feed-through voltage. Also, &Dgr;Vg is an amplitude of the gate signal, Cgs is a capacitance between the gate bus line and the pixel electrode when the TFT is in its conductive state, Cs is the storage capacitance, ClcB is the liquid crystal capacitance in the black display, and ClcW is the liquid crystal capacitance in the white display.
As an example, in the case of the 15-inch liquid crystal display device (XGA: 1024×768 pixels), the capacitance value of the storage capacitance Cs is decided as about 150 fF if &Dgr;Vc is 0.48 V, &Dgr;Vg is 26.5 V, Cgs is 33 fF, ClcB is 180 fF, and ClcW is 270 fF.
Since the value of Cgs has the voltage dependency, it is hard to calculate precisely the feed-through voltage, but such value of Cgs is approximated by the value obtained when the TFT is in its conductive state. Accordingly, when the feed-through voltage is measured actually, there is the possibility that the measured value is different from the calculated value. However, when the value of the storage capacitance Cs is decided experimentally to satisfy the above Eqs., the defects such as the sticking, etc. can be prevented.
In addition, the case where the storage capacitance is formed by the storage capacitance bus line
612
, the pixel electrode
68
,

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