Liquid crystal display device

Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal

Reexamination Certificate

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Details

C349S039000

Reexamination Certificate

active

06738106

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to an active matrix panel used in active matrix liquid crystal display devices and others, and a method for producing the same.
Liquid crystal panels include those of simple matrix type and those of active matrix type using a TFT (thin film transistor) as a switching element (TFT-LCD). In view of portability and display quality, the TFT-LCDs having more excellent characteristics than CRTs or liquid crystal display devices of simple matrix type are widely put into practical use in notebook-type personal computers and others.
In these TFT-LCDs, there is a problem that a flicker is generated owing to the distribution of field-through voltage in a display surface caused by parasitic capacitance of the TFT that they have.
Next, the field-through voltage will be described. Generally in an active matrix liquid crystal display using a TFT, the electric potential of pixel capacitance changes at the time when a gate writing signal falls due to the effect of parasitic capacitance between a gate and a drain of the TFT. This change is referred to as a field-through voltage. The field-through voltage V
FD
is represented as the following equation (1) using the capacitance Cgd between the gate and the drain of the TFT, a liquid crystal capacitance Clc, an auxiliary capacitance Cs, and a gate pulse amplitude &Dgr;V
G
.
V
FD
=C
gd·&Dgr;V
G
/(
Clc+Cs+Cgd
)  (1)
Next, the distribution of the field-through in the display surface will be described. The equation (1) holds in a case where the gate signal is an ideal pulse. However, in actual TFT-LCDs, the gate writing signal (scanning line selection pulse) input as a rectangular wave becomes loose accordance as the distance from the input terminal increases, owing to the time constant of a gate wiring. This looseness generates a time difference (&Dgr;t) between the time when the gate signal begins to fall and the time when the transistor is completely turned off, whereby the voltage of the pixel capacitance changing in the negative direction is pulled back in the positive direction by the field-through. Therefore, a difference in the field-through voltage is generated between the input side having a small looseness of the gate pulse and the end terminal side having a large looseness.
Taking the effect of this gate pulse looseness into account, the field-through voltage V
FD
is represented as the equation (2).
V
FD2
=(
Cgd·&Dgr;V
G
+∫I
DS
&Dgr;t
)/(
Clc+Cs+Cgd
)  (2)
&Dgr;t: gate delay time due to looseness
I
DS
: average value of the electric current flowing until the TFT is turned off
Since At is proportional to the wiring time constant (wiring resistance X wiring capacitance), &Dgr;t is negligibly small on the gate pulse input side, so that ∫I
DS
&Dgr;t≈0. Therefore, the field-through voltage difference between the gate pulse input side and the end terminal side is represented by the following equation (3) as the difference between the equation (1) and the equation (2).
&Dgr;
V
FD
=∫I
DS
&Dgr;t
/(
Clc+Cs+Cgd
)  (3)
If there is a difference in the field-through voltage, a difference is generated in the voltage applied to the liquid crystal between the right side and the left side of the screen, thereby causing a brightness non-uniformity. Also, a positive negative non-symmetry is generated in the alternating current display voltage, thereby causing flickers.
As described above, the field-through voltage difference in the display screen due to the looseness of the gate signal waveform is proportional to the gate wiring time constant, thereby raising a larger problem as the LCD becomes larger in scale.
In order to deal with this problem, as a method for reducing the distribution of the field-through voltage in the display screen, Japanese Unexamined Patent Publication No. 05-232509 (1993) discloses a method of compensating for the field-through voltage change due to the parasitic capacitance by allowing the auxiliary capacitance of the transistor element in the display surface to be large on the gate signal input terminal and to become smaller as it approaches the gate end terminal in the gate wiring direction.
Generally, the photomask used for forming a TFT array has a coarse resolution (about 0.5 &mgr;m pitch) as compared with those used for semiconductors. Therefore, if an overlapping area of the pixel electrode and the auxiliary capacitance electrode is changed, for example, in order to change the auxiliary capacitance over a range from the gate input terminal to the end terminal, it is difficult to provide a fine capacitance variation. Therefore, the change in the capacitance value is allowed to be a stepwise change as shown in
FIG. 11
, for example, by dividing the range into regions A, B, and C as shown in FIG.
10
. At this time, the field-through voltage in each region is distributed as shown in FIG.
12
. As a result, at a boundary AB where the region A including pixels a is in contact with the region B including pixels b having a different auxiliary capacitance value, for example, the change in the effective voltage difference is generated owing to the field-through voltage difference A V
FD2
, and this change may possibly degrade the display quality as a brightness non-uniformity.
Further, if a fine capacitance change can be provided, for example, by raising the mask precision, pixels having different auxiliary capacitances must be created as CAD data for the maximum number of source wirings (for example, 3840 in SXGA), to be disposed in the panel. The increase in the data volume and the increase in the cumbersomeness of the layout work occurring at this time degrade the CAD layout workability and, in the worst case, the CAD data volume may overflow to shut down the system or cause a mask layout mistake.
The present invention has been made to solve the aforementioned problems of the prior art technique, and an object thereof is to eliminate the brightness non-uniformity on the regional boundary line when the auxiliary capacitance value is varied in order to reduce the brightness non-uniformity and the flickers caused by the field-through voltage difference value.
SUMMARY OF THE INVENTION
A liquid crystal display device according to the first aspect of the present invention is a liquid crystal display device having a construction such that a liquid crystal is sandwiched between a TFT array substrate and an opposing substrate, in which display pixels having a pixel electrode electrically connected to a thin film transistor are formed in an array on the insulating substrate, a gate line that scans and selects each transistor line-sequentially and a source line that gives a signal potential for writing to the pixel electrode are formed in a matrix in an almost perpendicular manner, and an auxiliary capacitance is formed by forming the pixel electrode and an auxiliary capacitance electrode to partially overlap with each other, wherein pixels having varying auxiliary capacitance values by decreasing an overlapping part of the pixel electrode and the auxiliary capacitance electrode in a direction from a gate signal input terminal to an end terminal are disposed to be divided into a plurality of band-shaped regions, and regional boundaries thereof are unevenly shaped.
A liquid crystal display device according to the second aspect of the present invention is a liquid crystal display device having a construction such that a liquid crystal is sandwiched between a TFT array substrate and an opposing substrate, in which display pixels having a pixel electrode electrically connected to a thin film transistor are formed in an array on an insulating substrate, a gate line that scans and selects each transistor line-sequentially and a source line that gives a signal potential for writing to the pixel electrode are formed in a matrix in an almost perpendicular state, and an auxiliary capacitance is formed by forming the pixel electrode and the gate line to partially overlap with each other, wherei

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