Liquid crystal display device

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S094000, C345S095000, C345S090000, C345S099000, C345S097000, C345S100000, C345S204000, C345S212000, C345S214000

Reexamination Certificate

active

06489942

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates generally to liquid crystal display devices and, more particularly, to a technique adaptable for use with segment drivers in liquid crystal display devices of the simple matrix type.
Simple matrix type liquid crystal display devices such as liquid crystal display modules of super twisted nematic (STN) schemes for example are widely employed as display devices for use in notebook personal computers (PCs) and others.
FIG. 6
is a diagram showing a configuration of equivalent circuitry of a prior known liquid crystal display panel of presently available STN liquid crystal display modules along with peripheral circuitry.
The liquid crystal display panel is designated by numeral
101
and is designed to include a pair of glass substrates spatially opposing each other with a layer of liquid crystal disposed therebetween, wherein one glass substrate has its liquid crystal side surface on a plurality of parallel common electrodes
11
which are formed in such a manner that these extend in a direction “X” and laid out in a direction “Y” with each of the plurality of common electrodes
11
being connected to a corresponding one of common drivers as provided in a common driver unit
103
.
The other glass substrate has a liquid crystal side surface on which a plurality of parallel segment electrodes
10
are formed in a manner such that they extend in the direction Y and arrayed in the direction X with each of the plurality of segment electrodes
10
being connected to a corresponding one of segment drivers in a common driver unit
102
.
The plurality of segment electrodes and the plurality of common electrodes intersect each other at crossover points, each of which constitutes a picture element or “pixel” region, wherein the pixels are driven by applying drive voltages from respective segment drivers of said segment driver unit
102
to said plurality of segment electrodes
10
while applying drive voltages from respective common drivers of said common driver unit
103
to said plurality of common electrodes
11
.
Simple-matrix liquid crystal display devices are typically driven with time-division methods, one of which is the so-called line-sequential driving method that includes the steps of sequentially selecting one by one the common electrodes (or scan electrodes) within a single scanning time period and then applying a drive voltage to each pixel of the liquid crystal within this select period.
The line-sequential drive methodology typically includes an “Alt Pleshko” drive method (also known as smart addressing or HIFAS) and a standard drive method (called a voltage averaging method), both of which are well known among those skilled in the art to which the invention pertains.
Another method, called the alternate current (AC) drive method, is also employable which includes the step of inverting periodically, i.e. once per specified period, respective drive voltages applied to said plurality of segment electrodes and said plurality of common electrodes.
In the Alt Pleshko drive method, when an alternate current signal (M) is at High (simply referred to as “H” hereinafter) level, a drive voltage of Vsh is applied to each segment electrode of data “1” while letting a drive voltage of Vsl be applied to each segment electrode of data “0” as an example shown in FIG.
7
.
In addition, a drive voltage of Vcl is applied to a selected common electrode while simultaneously a drive voltage of Vm is applied to non-select common electrodes.
Note here that the drive voltage of Vm is applied to such non-select common electrodes irrespective of whether the alternate current signal (M) is at H level or Low (“L”) level.
Furthermore, when the alternate current signal (M) is at L level, the drive voltage of Vsl is applied to each segment electrode of data “1” while the drive voltage of Vsh is applied to each segment electrode of data “0” as an example shown in FIG.
7
.
Additionally a drive voltage of Vch is applied to a common electrode presently selected.
Note that
FIG. 7
shows some major voltage waveforms in the case of performing white displaying, wherein these drive voltages are to be supplied by a power supply circuitry. =p An equivalent circuitry of the STN liquid crystal display panel may be represented by a circuit shown in
FIG. 6
, which is considered as a circuit with liquid crystal capacitors (CLC) being formed at intersections between the segment electrodes
10
and the common electrodes
11
.
However, in the event that both the segment electrodes
10
and common electrodes
11
change or vary in potential level of the voltages being applied thereto, waveform rounding deformation or distortion will always occur in such applied voltages with no exceptions due to a relation of electrical interconnect lead resistivities of the segment electrodes
10
and common electrodes
11
versus the liquid crystal capacitors (CLC), as in a voltage waveform that is applied to a segment electrode
10
shown in
FIG. 8
as an example.
Such waveform distortion would result in a decrease in effective value of a voltage as applied to each pixel upon changing of its potential level-for example, in liquid crystal display panels of the normally-off type, the effective voltage reduction leads to an appreciable decrease in brightness of those images being visually displayed at corresponding locations on a panel screen.
The description of the phenomenon stated above will be collectively referred to as the “shadowing” hereafter.
Once this shadowing takes place at specific lines on the screen of a liquid crystal display panel, the resultant display image contains black fine stripe-shaped noises viewable like hair-lines to human eyes, which results in a significant decrease in quality of images displayed on the screen of such liquid crystal display panel.
Prior known remedies for such a problem include a method shown in
FIGS. 9
to
11
or another method shown in
FIGS. 12-14
.
The shadowing correction/compensation method shown in
FIGS. 9-11
is that, as shown in
FIG. 10
, a time point at which a drive voltage being applied to a segment electrode(s)
10
while changes in potential level are detected by an exclusive logical sum circuit (EXOR) to which a presently incoming data and its preceding data are inputted. Then an AND circuit (AND
1
) is used to obtain a logical product between an output of the exclusive logical sum circuit (EXOR) and a correction pulse thereby causing a correction-for-compensation signal to stay at H level within a time period in which the correction pulse is at H level.
As shown in
FIG. 9
, when this correction signal stays at H level, an output of an AND circuit (AND
1
) is set at L level while an output of a NAND circuit (NAND
1
) is forced to be at H level, which thereby causes both an N type MOS transistor (simply referred to as “NMOS” hereinafter) (NM
1
) and a P type MOS transistor (simply referred to as “PMOS” hereafter) (PM
1
) to turn off.
Alternatively, when the correction signal is at H level, either a PMOS (PM
2
) or NMOS (NM
2
) are turned on the basis of this correction signal and the present data value.
Whereby, when the correction signal is at H level, a drive voltage of either Vshh or Vsll is applied to the segment electrode.
In short, this method applies a pulse-like correction voltage (e.g. pulses
15
of
FIG. 11
) when the drive voltage being applied to a segment electrode
10
changes in potential level in order to ensure that an effective voltage applied to a pixel when the drive voltage applied to the segment electrode
10
becomes identical to an effective voltage applied to the pixel so that the drive voltage as applied to segment electrode
10
does not change in potential level as shown in FIG.
11
.
It should be noted in
FIG. 9
that a DISPOFF signal is set to control on and off of the liquid crystal display panel, wherein the liquid crystal display panel is driven to display images on its screen when the DISPOFF signal stays at H level, and no images are displayed on the liquid crystal display panel w

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