Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1998-08-28
2001-11-06
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S100000, C345S098000, C345S089000, C345S087000
Reexamination Certificate
active
06313819
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a liquid crystal display device, and more particularly relates to a source follower circuit constructed from a polysilicon thin film transistor (hereinafter referred to as a “polysilicon TFT” (Thin Film Transistor)) and an output circuit for the liquid crystal display device employing this source follower circuit as an output buffer.
Output buffers for charging each column line capacitor in a liquid crystal display device are generally constructed with voltage follower circuits employing operational amplifiers. However, in integrally forming a liquid crystal panel and a driver circuit thereof using polysilicon, complicated circuits for the operational amplifiers and variation in characteristics and large threshold voltage Vth of polysilicon TFTs make it difficult to form voltage follower circuits with polysilicon. This causes difficulty in integrally forming a liquid crystal panel and a driver circuit thereof with polysilicon.
It has therefore been considered to construct an output buffer using a source follower circuit of a simple circuit configuration. A simple source follower circuit configuration employing a polysilicon TFT is shown in FIG.
1
. In
FIG. 1
, a source follower transistor
101
is in a connection used as a source follower and a drain of the source follower transistor
101
is connected to a power supply VCC and a gate is served as an input terminal. A source of the source follower transistor
101
is served as an output terminal and a current source
102
is connected across the source and ground.
In the source follower circuit of this configuration, an offset corresponding to a gate-source voltage Vgs of the source follower transistor
101
occurs across the input and output terminals. Namely, the output voltage Vout becomes as
Vout=Vin−Vgs.
Since the offset potential Vgs is a function of variables such as the threshold voltage Vth of the transistor and the mobility of carriers &mgr; as is described later, the output voltage Vout therefore varies due to variations in transistor characteristics.
The offset potential Vgs of a source follower circuit can generally be expressed by the following equation.
Vgs=Vth+{square root over (Iref|k))}
and, k=0.5×&mgr;×Cox×W/L
where, Iref is current of the current source
102
, k is a constant, and Cox, W and L are a capacitance of a transistor oxidation film, gate width, and gate length, respectively.
As becomes clear from the above description, variation in the Vth of a transistor is substantial even for a source follower constructed with a polysilicon TFT, so that variation in output potential is also substantial. Therefore, when this circuit is used as an output buffer for charging each column line capacitor, there are large variations in output potential between the circuits. It is therefore difficult to employ a source follower circuit of the current configuration as an output buffer as it is for an integration of a liquid crystal panel and a driver using polysilicon.
In order to resolve the aforementioned problems, it is an object of the present invention to provide a liquid crystal display device having a source follower circuit with highly precise offset cancelling and an output circuit employing this source follower circuit.
SUMMARY OF THE INVENTION
The above object can be achieved by providing a liquid crystal display device comprising a source follower transistor in a connection used as a source follower; a capacitor with one end connected to the gate of the source follower transistor; a precharge supply; the first analog switch connected across the gate of the source follower transistor and the precharge supply; the second analog switch connected across the other end of the capacitor and the source of the source follower transistor, and operated simultaneously with the first analog switch; and the third analog switch connected across a signal source and the other end of the capacitor, and operated in reverse with respect to opening and closing operations of the first and second analog switches.
In the liquid crystal display device with the source follower circuit of the above configuration, in the precharge period, the first and second analog switches are turned on (closed) and the third analog switch is turned off (opened). A specific precharge voltage is then applied to the gate of the source follower transistor from the precharge supply via the first analog switch. At this time, a charge corresponding to an amount of offset Vos (=Vgs) is accumulated at a capacitor connected across the source and gate of the source follower transistor. After this, in the output period, the first and second analog switches are turned off and the third analog switch is turned on. The other side of the capacitor is then reconnected to a signal source and the gate of the source follower transistor is disconnected from the precharge supply. At this time, the gate potential of the source follower transistor becomes Vin+Vos. As a result, offset cancelling is carried out even when an offset Vos′ corresponding to Vgs is generated because Vos′ is given as Vos′=Vgs.
The liquid crystal display device of the present invention employs a source follower circuit of the above configuration as an output buffer for driving each column line. Highly precise offset cancelling can therefore be carried out with this source follower circuit even with circuits made of transistors such as polysilicon TFTs having a large threshold voltage Vth and having large amounts of variation in characteristics. Variations in output potential between each circuit can therefore be sufficiently reduced even when a plurality of circuits are lined up in parallel.
REFERENCES:
patent: 4518926 (1985-05-01), Swanson
patent: 4697154 (1987-09-01), Kousaka et al.
patent: 4781437 (1988-11-01), Shields et al.
patent: 5061920 (1991-10-01), Nelson
patent: 5103218 (1992-04-01), Takeda
patent: 5196738 (1993-03-01), Takahara et al.
patent: 5266936 (1993-11-01), Saitoh
patent: 5274284 (1993-12-01), Krenik et al.
patent: 5361041 (1994-11-01), Lish
patent: 5365199 (1994-11-01), Brooks
patent: 5739805 (1998-04-01), Dingwall
patent: 5900856 (1999-05-01), Iino et al.
patent: 5907314 (1999-11-01), Negishi et al.
patent: 5977940 (1999-11-01), Akiyama et al.
patent: 5995072 (1999-11-01), Nakajima
patent: 6181314 (2001-01-01), Nakajima et al.
patent: 0510696 A1 (1992-10-01), None
patent: 0 510 596 A1 (1992-10-01), None
patent: 0597315 A2 (1994-05-01), None
patent: 0657863 A2 (1995-06-01), None
patent: 97/05596 (1997-02-01), None
European Search Report dated Apr. 20, 2000.
“P-14: Low Output Offset, 8 bit Signal Drivers for XGA/SVGA TFT-LCDS”; I Minamizaki H Et Al; SID's International Display Research Conference; vol. Conf. 16, 1996, pp. 247-250.
Maekawa Toshikazu
Nakajima Yoshiharu
Hjerpe Richard
Kananen Ronald P.
Rader Fishman & Grauer
Sony Corporation
Zamani Ali A.
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