Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1998-10-05
2001-05-15
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S089000, C345S210000, C345S211000
Reexamination Certificate
active
06232941
ABSTRACT:
BACKGROUND
The present invention relates to a liquid crystal display device used for a personal computer or a work station, particularly to a technique to be effectively applied to a video signal line driving circuit (drain driver) of a liquid crystal display enabling multilevel gradation display.
An active-matrix liquid crystal display having an active element (e.g., thin film transistor) for each pixel and switching the active element is widely used as a display of a notebook computer. Because in the active-matrix liquid crystal display a video signal voltage (gradation voltage) is applied to a pixel electrode through an active element, there is no crosstalk between pixels, it is unnecessary to use a special driving method for preventing crosstalk unlike a passive-matrix liquid crystal display, and multilevel gradation display is possible.
A TFT liquid crystal display module provided with a TFT (Thin Film Transistor) liquid crystal display panel (TFT-LCD), a drain driver provided on the upper side of the liquid crystal display panel, and a gate driver and an interface section provided on the side of the liquid crystal display panel is known as one of active-matrix liquid crystal displays.
The TFT liquid crystal display module has a multilevel gradation voltage generation circuit in the drain driver and moreover has a gradation voltage selection circuit for selecting a gradation voltage corresponding to display data out of multilevel gradation voltages generated by the multilevel gradation voltage generation circuit in order to realize multilevel gradation display. This technique is disclosed in Japanese Patent Application No. 86668/1996.
In general, the gradation voltage selection circuit in the drain driver has a transistor group for selecting gradation voltages of multilevel gradation generated by the multilevel gradation voltage generation circuit in the drain driver, whose gate electrode is provided with a transistor group to whose electrodes the bit values of display data are applied.
For example, the gradation voltage generation circuit generates gradation voltages of 64 levels. Moreover, when assuming the gradation voltage generation circuit to be a decoder circuit to which bit values and their inverted bit values of 6-bit display data are input, 12 transistors are cascade-connected to the gradation voltage selection circuit for each of 64 levels of gradation.
Meanwhile, in the case of a liquid crystal display, multilevel gradation display has been further progressed from 64- level gradation display to 256-level gradation display in recent years.
Moreover, to display a picture of such a multilevel gradation on a liquid crystal display panel, the gradation voltage selection circuit in the drain drive requires 16 transistors for each of 256 levels of gradation. Therefore, there are problems that the area occupied by the gradation voltage selection circuit increases and the chip size of the semiconductor integrated circuit (IC chip) constituting the drain driver increases.
Furthermore, in the case of a liquid crystal display such as a TFT liquid crystal display module, the display screen is further increased in scale and therefore, the display screen size tends to be increased. Furthermore, to eliminate unnecessary spaces and improve the fine appearance of the display, it is demanded to minimize the region other than the display region of the display, that is, minimize the frame portion of the display (frame minimization).
However, when the area occupied by the gradation voltage selection circuit increases and the chip size of the semiconductor integrated circuit (IC chip) constituting the drain driver increases, there arises a problem that these increases cannot deal with the frame minimization.
The present invention has been made to solve the above conventional problems and its object is to provide a technique making it possible that a liquid crystal display generates gradation voltages of more gradations such as 256 gradations without increasing the chip size of video signal line driving means.
The above object and novel features of the present invention will become apparent from the description of this specification and accompanying drawings.
SUMMARY OF THE INVENTION
The outline of typical ones of the inventions disclosed in this application will be briefly described below.
A liquid crystal display provided with a liquid crystal panel having a plurality of pixels and a driving circuit for applying a video signal voltage to each of the pixels in accordance with display data, wherein
the driving circuit has a first circuit for outputting two voltages in accordance with one display data value and a second circuit for outputting one of a plurality of voltages generated from the two voltages.
A liquid crystal display provided with a liquid crystal panel having a plurality of pixels arranged like a matrix and a driving circuit for applying a video signal voltage to each of the pixels in accordance with display data, wherein
the driving circuit has a first circuit for outputting a first voltage and a second voltage in accordance with one display data value, a second circuit for receiving the first and second voltages and outputting one of a plurality of voltages generated from the first and second voltages, and a switch circuit for switching input terminals of the second circuit to which the first and second voltages are input.
A liquid crystal display provided with a liquid crystal panel having a plurality of pixels arranged like a matrix and a driving circuit for applying a video signal voltage to each of the pixels in accordance with display data, wherein
the driving circuit has a first circuit for outputting a first voltage and a second voltage in accordance with first display data and outputting the first voltage and a third voltage in accordance with second display data and a second circuit for receiving two voltages output by the first circuit and outputting one of a plurality of voltages generated from two voltages output by the first circuit.
A liquid crystal display provided with a liquid crystal panel having a plurality of pixels arranged like a matrix and a driving circuit for applying a video signal voltage to each of the pixels in accordance with m-bit display data, wherein
the driving circuit has a first voltage generation circuit for generating (2n+1)(where 2≦n≦m) first gradation voltages and
a second voltage generation circuit for receiving two voltages output by the first voltage generation circuit in accordance with high-order n-bit data of the m-bit display data and outputting one of a plurality of voltages generated from two voltages outputted by the first voltage generation circuit in accordance with low-order (m-n)-bit data of the m-bit display data.
A liquid crystal display provided with a liquid crystal panel having a plurality of pixels arranged like a matrix and a driving circuit for applying a video signal voltage to each of the pixels in accordance with m-bit display data, wherein
the driving circuit has a first voltage generation circuit for generating (2n+1)(where 2≦n≦m) first gradation voltages and outputting two voltages in accordance with high-order n-bit data of the m-bit display data, a second voltage generation circuit for receiving two voltages, outputted by the first voltage generation circuit at a first input terminal and a second input terminal and outputting one of a plurality of voltages generated from two voltages outputted by the first voltage generation circuit in accordance with low-order (m-n)-bit data of the m-bit display data, and a switch circuit for connecting the output of the first voltage generation circuit to the first and second input terminals.
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Agata Kentaro
Fujioka Takahiro
Goto Mitsuru
Katayanagi Hiroshi
Kurokawa Kazunari
Antonelli Terry Stout & Kraus LLP
Hitachi , Ltd.
Hjerpe Richard
Nguyen Kevin M.
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