Liquid crystal display control circuit

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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C345S094000, C345S100000

Reexamination Certificate

active

06894673

ABSTRACT:
A liquid crystal display control circuit receives a data enable signal DE in synchronization with per-line based display data from a computer, and thereby controls a liquid crystal display. A gate drive signal outputted from a gate driver23is generated according to a vertical clock signal VCK in synchronization with a rise of the signal DE. In order to avoid a variation in the period of charging the pixel electrodes which is caused by a delay in the rise timing of the signal DE and a delay in the signal VCK after the last line, a gate enable signal generation circuit10is provided in the liquid crystal display control circuit1, whereby the extended output of the pulse of the gate drive signal caused by the above-mentioned delays is inhibited. This avoids display inhomogeneity caused by a variation in the data enable signal and the like.

REFERENCES:
patent: 6151016 (2000-11-01), Kanbe et al.
patent: 20020024482 (2002-02-01), Song et al.
patent: 20030038766 (2003-02-01), Lee et al.
patent: 10-301544 (1998-11-01), None

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