Liquid crystal display and thin film transistor with...

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material

Reexamination Certificate

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C257S347000, C257S249000, C257S382000, C257S383000, C257S384000, C438S151000, C438S161000

Reexamination Certificate

active

06236062

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Industrial Field of the Invention
The present invention relates to an active matrix type liquid crystal display and to a manufacturing process of a thin film transistor (hereinafter referred to as TFT) used as a drive element in the liquid crystal display.
2. Prior Art
Recent years, the active matrix type liquid crystal display device comprising a TFT array substrate composed by arranging a TFT on a transparent insulating substrate such as glass forming a matrix and a liquid crystal, has been commercialized into a flat display under the expectation of flattening of image display, and has now a bright future in view of developing a large market of notebook type personal computer, OA monitor, etc.
In the greater part of the TFT, an amorphous silicon capable of being deposited on a large area at a relatively low temperature is employed as a semiconductor layer. An example is illustrated in
FIG. 3
showing a sectional view of an essential part of a TFT array on which a TFT is mounted and in
FIG. 4
showing a sectional view of the TFT array under manufacture. In the drawings, reference numeral
1
designates an insulating substrate, numeral
2
designates a gate electrode formed on the insulating substrate
1
, numeral
3
is a gate insulating film formed to coat the gate electrode
2
and an auxiliary capacity electrode
8
, numeral
4
is a semiconductor layer composed of a-Si:H (amorphous silicon to which hydrogen atom is added) film
4
a
formed on the gate electrode
2
through the gate insulating film
3
, numeral
5
is an ohmic contact layer composed of a n
+
a-Si:H film
5
a
formed on the semiconductor layer
4
, numeral
9
is a picture element electrode, numerals
10
and
11
are a pair of electrodes (source electrode
10
and drain electrode
11
) formed on the ohmic contact layer
5
, and numeral
12
is a passivation film formed to coat the entire device.
A manufacturing process of the mentioned conventional TFT is hereinafter described. After forming a first conductive thin film on the insulating substrate
1
, the first conductive thin film is patterned by photoengraving process, whereby the gate electrode
2
and the auxiliary capacity electrode
8
are formed. Then, after forming continuously the gate insulating film
3
, the a-Si:H film
4
a
and the n
+
a-Si:H film
5
a
by plasma CVD, the a-Si:H film
4
a
and the n
+
a-Si:H film
5
a
are patterned into an island, whereby the semiconductor layer
4
and the ohmic contact layer
5
are formed. After forming a second conductive thin film, the second conductive thin film is patterned by photoengraving process, whereby the picture element electrode
9
is formed. After forming a third conductive thin film composed of Al—Si alloy, etc., the third conductive thin film is patterned by photoengraving process, whereby the source electrode
10
and the drain electrode
11
are formed. The ohmic contact layer
5
is then etched using the source electrode
10
and the drain electrode
11
as a mask, and the ohmic contact layer
5
is cut into two parts. The passivation film
12
is then formed by plasma CVD. Thus, a TFT array on which TFT is mounted is formed.
FIG. 4
shows a sectional view after having continuously formed the a-Si:H film
4
a
which forms the semiconductor layer
4
and the n
+
a-Si:H film
5
a
which forms the ohmic contact layer
5
. In the conventional manufacturing process, however, since the a-Si:H film
4
a
and the n
+
a-Si:H film
5
a
are further patterned into an island, a photoresist is applied to the two films after performing a wet cleaning, and a resist pattern is formed through the steps of exposure and development. At this time, as the surface of the n
+
a-Si:H film
5
a
has a hydrophobic property and a low wettability immediately after forming the film, a dry spot is produced at the time of drying after the wet cleaning. When such a dry spot is produced, in the step of etching the ohmic contact layer
5
(the n
+
a-Si:H film
5
a
) using the source electrode
10
and the drain electrode
11
as a mask, the dry spot performs as the mask and an etch residue is produced or left, which brings about a failure or defect such as short circuit between the source electrode
10
and the drain electrode
11
, and if using such a defective TFT as a drive element of a liquid crystal display, any display failure is caused in the liquid crystal display.
To prevent such a dry spot, it is effective to make hydrophilic the surface of the n
+
a-Si:H film
5
a
which forms the ohmic contact layer
5
, and therefore in the conventional manufacturing process, for example, an UV treatment step is added between the step of forming the film by the plasma CVD apparatus and the step of wet cleaning, so that the surface of the n
+
a-Si:H film
5
a
is oxidized and a hydrophilic property is given thereto.
Since the conventional treatment for giving a hydrophilic property to the surface of the n
+
a-Si:H film
5
a,
which is applied in view of preventing the production or occurrence of the dry spot resulting in the undesirable etch residue at the time of patterning the n
+
a-Si:H film
5
a
which forms the ohmic contact layer
5
, is an UV treatment as mentioned above, such a treatment cannot be applied by any manufacturing apparatus used just for forming the ohmic contact layer, but any additional treatment step by using other apparatus is required. Hence, there arises a problem of lowering a productivity.
SUMMARY OF THE INVENTION
The present invention was made to solve the above-discussed problem and has an object of providing a process for manufacturing a highly reliable thin film transistor at a high yield without lowering a productivity, in which occurrence of a dry spot and occurrence of an etch residue of the ohmic contact layer (n
+
a-Si:H film) due to the dry spot are prevented in the photoengraving process for patterning the semiconductor layer and the ohmic contact layer into an island, without any further treatment by any other apparatus.
Another object of the invention is to produce a highly reliable liquid crystal display at a high yield by mounting a TFT having no etch residue of the n
+
a-Si:H film which forms the ohmic contact layer as a drive element.
To accomplish the foregoing objects, a manufacturing process of a thin film transistor according to the invention comprises the steps of: forming a control electrode on a substrate; forming an insulating film, a semiconductor film and a contact film continuously on the control electrode; giving a hydrophilic property to a surface of said contact film by nitriding or oxidizing the surface of the contact film after forming the contact film; forming a semiconductor layer and a contact layer by forming a resist and patterning the semiconductor film and the contact film; forming a pair of electrodes which form a semiconductor device with the semiconductor layer; and etching the contact layer using the pair of electrodes as a mask.
It is preferable that the step of giving a hydrophilic property to the contact film is a nitriding treatment of the surface of the contact film by a N
2
gas plasma.
It is preferable that the step of giving a hydrophilic property to the contact film is a nitriding treatment of the surface of the contact film by a mixed gas plasma of N
2
and He.
It is preferable that the step of giving a hydrophilic property to the contact film is a nitriding treatment of the surface of the contact film by an O
2
gas plasma.
It is preferable that a thin film formed by the step of giving a hydrophilic property to the contact film is removed after forming the semiconductor layer and the contact layer.
A liquid crystal display according to the invention comprises: an insulating substrate; a control electrode formed on the insulating substrate; an insulating film formed on the control electrode; a semiconductor layer formed on the control electrode through said insulating film; a contact layer having a thin film nitride or oxide on a sur

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