Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-01-31
2004-04-27
Shalwala, Bipin (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S094000, C345S209000
Reexamination Certificate
active
06727878
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a dot matrix type liquid crystal display, and in particular, an active matrix type liquid crystal display where the polarity of the write voltage which is applied to the liquid crystal cell is inverted after every plurality of scan lines.
2. Description of the Related Art
Of the liquid crystal displays commonly used, types such as STN (Super Twisted Nematic) and TFT (Thin Film Transistor) are representative. Of these types, an STN type liquid crystal display uses a passive matrix drive. In other words, with a passive matrix drive, the liquid crystal panel is constructed of electrodes and liquid crystal without the provision of switching elements, and the liquid crystal of each pixel positioned in the matrix is driven with time-division in synchronization with a scan signal.
In contrast, TFT type liquid crystal displays are active matrix driven. In other words, with an active matrix drive, by positioning switching elements comprising active elements such as TFTs at each pixel, it becomes possible to isolate the ON pixels and the OFF pixels and hold the voltage applied to the ON pixels, and drive with time division and synchronize the liquid crystal of each pixel positioned in the matrix with a scan signal. Because this method offers good contrast and response, and high image quality and large displays can be easily realized, recently active matrix type liquid crystal displays have become predominant.
From this point, discussion will center on active matrix type liquid crystal displays. Firstly, liquid crystal displays use a line-sequential driving method, where a single screen image is displayed by driving the scan lines in sequence from the uppermost scan line toward the lowest scan line. Moreover, this one screen is generally called a frame (or a field). Furthermore, in a liquid crystal display, when the liquid crystal cells are driven, in order to prevent the liquid crystal material from deteriorating, the polarity of the write voltage applied to the liquid crystal cells is inverted after a predetermined amount of time elapses, resulting in driving by an alternating current.
Here, the timing of the inversion of the polarity of the write voltage can be performed on either a frame by frame basis, a scan line by scan line basis, or a pixel (dot) by pixel basis, and these are known as frame inversion drive, line inversion drive and dot inversion drive respectively. Of these methods, the most fundamental driving method is frame inversion drive, where the polarity of the write voltage to be applied to each pixel is changed for every frame. In other words, if a specific pixel in a certain frame is driven with a positive polarity, then after the driving of the whole frame has been performed, if the same pixel is to be driven again, it will be driven with a negative polarity.
In contrast, line inversion drive and dot inversion drive are methods where the polarity can be inverted even within one frame. Of these, with line inversion drive (more accurately, one line inversion drive), if a certain scan line is driven with positive polarity, then the next scan line directly below this scan line is driven with negative polarity, and the following scan line is again driven with positive polarity. Dot inversion drive is a method where the polarity is inverted for every pixel on each scan line, and with two adjacent liquid crystal cells as a unit, the polarity of the write voltage is changed alternately.
However, when the polarity of the write voltage has been inverted, it is necessary for the drain line for supplying this write voltage to the liquid crystal cell to be charged from a negative polarity voltage to a positive polarity voltage, or alternatively, discharged from a positive polarity voltage to a negative polarity voltage. Consequently, with line inversion drive, the charging and discharging of the drain lines is performed frequently, and power consumption increases. Hence, if the polarity of the write voltage is inverted for each single scan line as described above, then the increase in power consumption will be quite marked.
If frame inversion drive is used, then power consumption can be reduced, but because in this case voltage of the same polarity is continually held in the liquid crystal cell for the period of one frame, a different problem occurs in that the display level of the pixel is disrupted by current leakage from the TFT. Because of this, recently as a compromise, “Multiple Line Inversion Drive” where the polarity of the write voltage is inverted after every plurality of lines is beginning to be used. However, in this type of multiple line inversion drive also, there are problems as described below.
Here,
FIG. 9
shows the structure of essential sections of a liquid crystal display according to related art, and here only those matters pertaining to the problems of this related art will be described. Firstly, each pixel comprises a TFT
100
and a liquid crystal cell
101
as shown in the figure. Each pixel is placed at a point of intersection between a plurality of gate lines
102
which run in rows (the scanning direction) and a plurality of drain lines
103
which run in columns, and these pixels form a liquid crystal panel
104
.
A gate driver
105
, by sequentially supplying a drive voltage to the gate line
102
, controls the conduction state of the TFTs
100
which are connected to each gate line. Furthermore, a source driver
106
, by supplying a write voltage to the drain line
103
, conducts writing to each of the liquid crystal cells
101
via the TFT
100
driven by the gate driver
105
. Moreover, a timing controller
107
transmits a variety of control signals to the gate driver
105
and the source driver
106
. Furthermore, a fixed voltage is applied to a common electrode
108
, which is connected to one end of the liquid crystal cell
101
.
Next,
FIG. 10
shows a timing waveform of the liquid crystal display shown in
FIG. 9
when a two line inversion drive is used. In the figure, a clock signal VCK is used by the gate driver
105
to sequentially activate the gate lines
102
. Furthermore, a latch pulse signal STB is a timing signal for transmitting one scan line of image data taken into the source driver
106
to the drain line
103
. Here, in the frame directly before the frame corresponding with the timing shown in
FIG. 10
, a write voltage of a negative polarity is assumed to have been applied to the nth and the nth+1 scan lines. Moreover, the nth scan line (gate line) will be referred to simply as the n line in the following description, and the other scan lines will be referred to in the same manner.
Firstly, when the clock signal VCK rises at time t
100
, the drive voltage shown as the “n line gate waveform” is applied to the n line, and the pixels connected to this gate line are selected. Next, when the latch pulse signal STB falls at time t
101
, the write voltage corresponding with the image data on the n line is applied to the drain line
103
, and writing commences to the liquid crystal cell
101
which is connected to this n line.
However, this case describes the situation immediately following an inversion of the polarity of the write voltage, and in addition to the capacity of the liquid crystal cell
101
the capacity of the drain line
103
must also be charged (or in the case of the transition from write voltage of a positive polarity to write voltage of a negative polarity, must be discharged). Consequently, the voltage of the drain line
103
gradually rises from a write voltage of a negative polarity to a write voltage of a positive polarity, until a time t
102
when the rise of the voltage finally stops.
Subsequently, when a time t
103
is reached following the elapsing of a time T, which corresponds to one horizontal period on the screen, from the time t
100
, the drive voltage is no longer applied to the n line, and instead the drive voltage represented by the “n+1 line gate waveform” is applied to the n+1 line. Next, when t
Koga Koichi
Okuzono Noboru
McGinn & Gibb PLLC
NEC LCD Technologies Ltd.
Osorio Ricardo
Shalwala Bipin
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