Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2000-06-15
2003-04-15
Shalwala, Bipin (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S094000, C345S095000, C345S098000, C345S100000, C345S208000, C345S209000, C345S210000
Reexamination Certificate
active
06549187
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an active matrix liquid crystal display, and more particularly concerns a liquid crystal display which can eliminate uneven luminance occurring every other line in a (2×1) dot-inversion driving system.
Liquid crystal displays, which carry out a display process by controlling a voltage to be applied to a liquid crystal while combining photoelectric characteristics of the liquid crystal and deflection plates, are lighter as compared with CRTs and superior in portability, and have been widely used in recent years as display devices for mobile computers, etc. Among these, active matrix liquid crystal displays, which have a switching element such as a TFT for each of the pixels so as to control a voltage to be applied to the liquid crystal, are superior in display quality as compared with simple-matrix type liquid crystal displays, and have been intensively developed and come to be widely used.
FIGS.
12
(
a
) and
12
(
b
) show an equivalent circuit of a base active matrix liquid crystal display, and an explanation will be given of the operation thereof. A switching element
123
such as a TFT, a liquid crystal capacitance
128
and an auxiliary capacitance
129
are formed at an intersection between a gate line
121
and a source line
122
; thus, a pixel is formed. These pixels are arranged in a matrix format so as to form a pixel array. When a selection pulse is applied to one of the gate lines, all the switching elements connected to the gate line are turned on, with the result that signals applied to the source lines connected to the switching elements are written in the liquid crystal capacitance and the auxiliary capacitance. On the other hand, when the gate line comes to a non-selected state, the switching elements are turned off, with the result that charges stored in the liquid crystal capacitance and the auxiliary capacitance are held until a selection pulse is inputted to the gate line after a lapse of one vertical scanning period.
FIG. 13
shows gate electrical potential Vg, a source electrical potential Vs, and a pixel electrical potential Vd in raster display of (2×1) dot inversion driving system.
FIG. 13
shows a case in which, when n-th scanning line is selected, the polarity of a source signal is inverted to (
131
).
In the (2×1) dot inversion driving system in which the polarity of the pixel potential is allowed to change for every two lines of adjacent pixels in the vertical direction and for every one row thereof in the horizontal direction, source potentials having different polarities are inverted for every two horizontal scanning periods for every adjacent source wires. In the case when raster (the same color on the entire screen) display is made in the above-mentioned driving system, at the time of selecting n-th gate at which the polarity of the source signal is inverted, a delay for approximately several microseconds occurs until the source potential has reached a predetermined potential. This is mainly because, since the output resistivity of the source IC is several kilo-ohms and the wiring resistivity of the source potential is approximately several K to several tens k&OHgr;, the above-mentioned time is required for charging the source wiring and pixel electrode. In contrast, at the time of selecting (n+1)th gate (
132
) at which no inversion is made in the source potential, the source potential has reached a predetermined potential at the time when the gate wiring is selected. Consequently, in the conventional technique as shown in
FIG. 13
, since the effective writing time to the pixel electrode is shorter at the time of selection of the n-th gate than that at the time of selection of the (n+1)th gate, unevenness in luminance occur for each line in the raster display.
There are various driving systems for the active matrix liquid crystal display, and in order to prevent flickers on the screen at the time of shut-out of windows, the (2×1) dot inversion driving system in which the polarities of adjacent pixels are inverted for every two lines in the vertical direction and for every one row thereof in the horizontal direction have come to be widely used in recent years.
In the conventional (2×1) dot inversion driving system, since the gate wires are selected for each line as illustrated in
FIG. 14
, a selection pulse is inputted to the gate wire only once during on horizontal scanning period. Therefore, in the above-mentioned driving system, a charging process to the pixel has to be finished during one horizontal scanning period when the gate wire is selected by the selection pulse only once.
In general, in the (2×1) dot inversion driving process is used in order to prevent flickers occurring on the screen at the time of shut-out of windows. These flickers become conspicuous as the high-precision and large size of the active matrix liquid crystal displays are achieved; therefore, the (2×1) dot inversion driving system has come to be adopted to high-precision or large size active matrix liquid crystal displays. However, as the high-precision and large size of the active matrix liquid crystal displays are achieved, it becomes more difficult to finish the charging process to the pixel during one horizontal scanning period, and the above-mentioned unevenness in luminance for each line tends to become more conspicuous.
Since one horizontal scanning period is shortened following the recent developments of high-precision or large size active matrix liquid crystal displays, the conventional technique has come to fail to charge the pixel during one horizontal scanning period.
FIG. 15
shows waveforms of a certain pixel gate potential
151
, source potential
152
and pixel potential
153
in the conventional driving system. When a selection pulse is inputted to the gate wire, a certain positively polarized source potential V
3
is written in the pixel potential in which a certain negatively polarized source potential V
1
has been written (variations in the pixel potential due to a parasitic capacitance are not shown in the waveforms in the Figure). Normally, the polarity of a voltage to be applied to a liquid crystal is inverted for each vertical scanning period in order to prevent degradation in the liquid crystal; therefore, in the case when a liquid crystal of 5V system is used, the difference between V
1
and V
3
is approximately 8V at maximum, and in the case of an auxiliary capacitance of 0.2 (pF) and a liquid crystal capacitance of 0.3 (pF), the system has to be designed so as to charge a voltage of approximately 8V to a capacitance of 0.5 (pF) within one horizontal scanning period. However, in recent developments of high-precision or large size active matrix liquid crystal displays, the one horizontal scanning period is further shortened, and it becomes more difficult to charge the pixel within one horizontal scanning period.
SUMMARY OF THE INVENTION
In the liquid crystal display of the present invention which is n active matrix liquid crystal device of the (2×1) dot inversion driving system, charging characteristics of the pixel are made uniform both at the time of selecting the n-th line gate wire
1
at which the polarity of the source potential is inverted and at the time of selecting the (n+1)th line gate wire
2
at which no inversion is made in the source potential.
Moreover, as compared with a first selection pulse at the time of selecting the n-th line gate wire
1
, a second selection pulse at the time of selecting the (n+1)th line gate wire
2
is set to have a shorter width.
Moreover, the first selection pulse is delayed and both of the widths of the first selection pulse and the second selection pulse are made smaller.
Furthermore, a control pulse for desirably setting the time and width of the first selection pulse and the second selection pulse is provided.
Here, the driving capability of the switching element placed in the pixel on n-th line gate wire
1
is made greater than the driving capability of th
Kohtaka Satoshi
Matsubara Ryouta
Nakagawa Naoki
Advanced Display Inc.
Dharia Prabodh M.
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Shalwala Bipin
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