Linking of applications into devices having overlays and...

Data processing: software development – installation – and managem – Software program development tool – Linking

Reexamination Certificate

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Details

C717S124000, C719S331000, C711S002000, C711S152000, C711S145000

Reexamination Certificate

active

07028294

ABSTRACT:
In one embodiment a method for handling shadow or overlay memories is described wherein a linker contains a description of the memory of a target embedded system so that each memory space is described for each state of the control devices. The linker in one embodiment contains the shadow memory configuration information so that post linker tools such as loaders and debuggers can utilize this information. The information for each configuration includes how to get the device into the state that makes each configuration visible in address space, how to get the device back into the state it was in before the state was changed and how to find out the state the device is in.

REFERENCES:
patent: 5321818 (1994-06-01), Wendling et al.
patent: 5321828 (1994-06-01), Phillips et al.
patent: 5850562 (1998-12-01), Crump et al.
patent: 6883167 (2005-04-01), Szewerenko et al.

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