Linked PCB and the linking method thereof

Details Linked PCB and the linking method thereof Linked PCB and the linking method thereof

1999-09-02

2002-07-30

Patel, Tulsidas (Department: 2839)

Electrical connectors

Preformed panel circuit arrangement, e.g., pcb, icm, dip,...

With provision to conduct electricity from panel circuit to...

C439S511000

Reexamination Certificate

active

06425767

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a linked PCB and the linking method thereof, which can link two PCBs layered with a different number of layers and reduce the cost for the overall linked PCB without losing good connection characteristics.
2. Description of the Related Art
With the growing number of highly complicated circuits, the demand for multi-layer PCBs has also increased. However, the success of an electronics product usually resides in its competitive price. Therefore, it has become an important issue to reduce the cost for the multi-layer PCBs which occupy a large percentage of the cost for the overall product.
A multi-layer PCB- is a printed circuit board layered with two or more layers, and is used to fabricate a high-density circuit. In most cases, a high-density circuit is printed on a single multi-layer PCB. However, the density of the high-density circuit is usually higher in some regions and lower in other regions. It is uneconomical to fabricate both the higher-density regions and the lower-density regions on a multi-layer PCB.
According, some methods have been disclosed to respectively fabricate the higher-density regions and the lower-density regions on a multi-layer PCB and a single-layer PCB, respectively, and link these two PCBs by connectors, cables or pins, so that the cost for the multi-layer PCB can be lowered.
FIG. 1
(Prior Art) is a diagram showing a first linked PCB in which a multi-layer PCB and a single-layer PCB are linked by connectors and cables. As shown in
FIG. 1
, the multi-layer PCB
1
is represented by dense inclined lines, and the single-layer PCB
2
is represented by sparse inclined lines. Connectors
3
a,
3
b
are respectively mounted at either sides of the multi-layer PCB l and the single-layer PCB
2
. A cable
4
is connected between the connectors
3
a,
3
b.
In this case, lower-density regions of a high-density circuit are fabricated on the single-layer PCB
2
, so the area of and the cost for the multi-layer PCB
1
which is used to fabricate higher-density regions of the high-density circuit can be reduced. However, for small circuits, the cost for the connector
3
a,
3
b
and the cable
4
as well as the labor may still occupy a large percentage of the cost for the overall linked PCB. Therefore, the cost reduction of this method is limited.
FIG. 2
(Prior Art) is a diagram showing a second linked PCB in which a multi-layer PCB and a single-layer PCB are linked by connectors. As shown in
FIG. 2
, the second linked PCB is similar to the first linked PCB as shown in
FIG. 1
except that, in the second linked PCB, a male connector
3
a′
and a female connector
3
b′
are mounted on either sides of the multi-layer PCB
1
and the single-layer PCB
2
to directly link these two PCBs. Therefore, the cost for the cable
4
can be reduced as compared with the first linked PCB, as shown in FIG.
1
.
FIG. 3
(Prior Art) is a diagram showing a third linked PCB in which a multi-layer PCB and a single-layer PCB are linked by a row of pin-sets. As shown in
FIG. 3
, the third linked PCB is similar to the second linked PCB as shown in
FIG. 2
except that, in the third linked PCB, the row of pin-sets
5
are directly stuck into opposed side surfaces of the multi-layer PCB
1
and the single-layer PCB
2
to link these two PCBs together. Therefore, the cost for the male connector
3
a′
and the female connector
3
b′
can be further eliminated as compared with the second linked PCB as shown in FIG.
2
. In practice, in order to keep intervals between the pin-sets
5
constant, the pin-sets
5
are usually made of rigid material. As a result, the pin-sets
5
, when tinning, will seize the multi-layer PCB
1
and the single-layer PCB
2
tightly, resulting in an unevenly linked PCB due to the difference between the expansion coefficient of the multi-layer PCB
1
and that of the single-layer PCB
2
.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide a linked PCB and the linking method thereof, which can link two PCBs layered with a different number of layers and reduce the cost for the overall linked PCB without losing good connection characteristics.
To realize the above and other objects, the present invention provides a method of linking two PCBs. The linking method includes the steps of:
(a) First, provide a first PCB which defines a row of through holes at one side to connect signals on the first PCB;
(b) Then, provide a second PCB which defines a row of through holes at one side to connect signals on the second PCB;
(c) Arrange the first and second PCBs so that the through holes of the first PCB align with those of the second PCB;
(d) Then, insert jumpers between the through holes of the first PCB and those of the second PCB; and
(e) Tin the first and second PCBs to connect these two PCBs.
In this linking method, the first and second PCBs can be layered with different numbers of layers. When the first and second PCBs are arranged so that the through holes of the first PCB align with those of the second PCB, the through holes of the first PCB are spaced from those of the second PCB by a predetermined pitch. The step (c) can be achieved using a fixing device, while the step (d) can be achieved using an element-inserting machine.
Further, the present invention provides a linked PCB derived from the method mentioned above. The linked PCB includes a first PCB, a second PCB and several jumpers. In the linked PCB, a row of through holes are defined at one side of the first PCB to connect signals therefrom to signals from the second PCB. Similarly, a row of through holes are also defined at one side of the second PCB to connect signals therefrom to the signals on the first PCB. The through holes of the first PCB correspond to those of the second PCB. The jumpers are then placed between the first and second through holes to connect the first and second PCBs, and tinned to connect these two PCBs.


REFERENCES:
patent: 2740097 (1956-03-01), Edelman et al.
patent: 3895266 (1975-07-01), Geiger
patent: 4143342 (1979-03-01), Cain et al.
patent: 2110006 (1983-06-01), None
J. Lyman, Sized Solder Bumps Make Solid Joints, Electronics, vol. 54, No. 22, Nov. 1981.

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