Linked network switch configuration

Details Linked network switch configuration Linked network switch configuration

2001-08-31

2008-09-09

Chan, Wing F. (Department: 2619)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S229000, C370S230000

Reexamination Certificate

active

07424012

ABSTRACT:
A network device having a plurality of ports including address resolution logic (ARL), a first switch, a second switch, and a CPU. The first and second switches include groups of ports which are a subset of the plurality of ports and are numbered by different numbering schemes, rate control logic for performing rate control functions related to switching data packets between the network ports, and local communications channels for transmitting messages between the groups of ports and the rate control logic. The first switch is configured to generate a rate control message and relay the rate control message to the second switch, and the second switch is configured to generate a second rate control message based on the first rate control message, where the second rate control message is different than the first message.

REFERENCES:
patent: 5278789 (1994-01-01), Inoue et al.
patent: 5390173 (1995-02-01), Spinney et al.
patent: 5414704 (1995-05-01), Spinney
patent: 5423015 (1995-06-01), Chung
patent: 5459717 (1995-10-01), Mullan et al.
patent: 5473607 (1995-12-01), Hausman et al.
patent: 5499295 (1996-03-01), Cooper
patent: 5524254 (1996-06-01), Morgan et al.
patent: 5555398 (1996-09-01), Raman
patent: 5568477 (1996-10-01), Galand et al.
patent: 5579301 (1996-11-01), Ganson et al.
patent: 5644784 (1997-07-01), Peek
patent: 5652579 (1997-07-01), Yamada et al.
patent: 5696899 (1997-12-01), Kalwitz
patent: 5742613 (1998-04-01), MacDonald
patent: 5748631 (1998-05-01), Bergantino et al.
patent: 5781549 (1998-07-01), Dai
patent: 5787084 (1998-07-01), Hoang et al.
patent: 5790539 (1998-08-01), Chao et al.
patent: 5802052 (1998-09-01), Venkataraman
patent: 5802287 (1998-09-01), Rostoker et al.
patent: 5825772 (1998-10-01), Dobbins et al.
patent: 5828653 (1998-10-01), Goss
patent: 5831980 (1998-11-01), Varma et al.
patent: 5842038 (1998-11-01), Williams et al.
patent: 5845081 (1998-12-01), Rangarajan et al.
patent: 5887187 (1999-03-01), Rostoker et al.
patent: 5892922 (1999-04-01), Lorenz
patent: 5898687 (1999-04-01), Harriman et al.
patent: 5909686 (1999-06-01), Muller et al.
patent: 5918074 (1999-06-01), Wright et al.
patent: 5940596 (1999-08-01), Rajan et al.
patent: 5987507 (1999-11-01), Creedon et al.
patent: 6011795 (2000-01-01), Varghese et al.
patent: 6041053 (2000-03-01), Douceur et al.
patent: 6061351 (2000-05-01), Erimli et al.
patent: 6098103 (2000-08-01), Dreyer et al.
patent: 6108306 (2000-08-01), Kalkunte et al.
patent: 6118761 (2000-09-01), Kalkunte et al.
patent: 6119196 (2000-09-01), Muller et al.
patent: 6167029 (2000-12-01), Ramakrishnan
patent: 6175902 (2001-01-01), Runaldue et al.
patent: 6185185 (2001-02-01), Bass et al.
patent: 6246692 (2001-06-01), Dai et al.
patent: 6633585 (2003-10-01), Ghanwani et al.
patent: 6690668 (2004-02-01), Szczepanek et al.
patent: 6704280 (2004-03-01), Mangin et al.
patent: 6735173 (2004-05-01), Lenoski et al.
patent: 6754216 (2004-06-01), Wong et al.
patent: 6977895 (2005-12-01), Shi et al.
patent: 0 312 917 (1989-04-01), None
patent: 0 465 090 (1992-01-01), None
patent: 0 752 796 (1997-01-01), None
patent: 0 849 917 (1998-06-01), None
patent: 0 853 441 (1998-07-01), None
patent: 0 854 606 (1998-07-01), None
patent: 0 859 492 (1998-08-01), None
patent: 0 862 349 (1998-09-01), None
patent: 0 907 300 (1999-04-01), None
patent: 2 725 573 (1996-04-01), None
patent: 4-189023 (1992-07-01), None
patent: WO 98/09473 (1998-03-01), None
patent: WO 99/00938 (1999-01-01), None
patent: WO 99/00939 (1999-01-01), None
patent: WO 99/00944 (1999-01-01), None
patent: WO 99/00945 (1999-01-01), None
patent: WO 99/00948 (1999-01-01), None
patent: WO 99/00949 (1999-01-01), None
patent: WO 99/00950 (1999-01-01), None
patent: WO/9900936 (1999-01-01), None
patent: WO 00/03256 (2000-01-01), None
Level One: “Level One™ IXP1200 Network Processor”, Sep. 1999, XP002187948, URL:http://www.cs.utah.edu/{cs6935/Previous/s01
etprocs/ixa/ixp1200ad.pdf, retrieved on Jan. 22, 2002.
Noureddine W et al: “Selective Back-Pressure in Switched Ethernet LANS” 1999 IEEE Global Telecommunications Conference, Globecom'99, Seamless Interconnection for Universal Services, Brazil, IEEE Global Telecommunications Conference, New York, vol. 2, Dec. 5, 1999, pp. 1256-1263, XP002258500.
Doganata Y N et al: “Effects of Cascading on the Performance of a Switching Subsystem”, Communication for Global Users, Including a Communications Theory Mini Conference , Orlando, 1992, Proceedings of The Global Telecommunications Conference (Globecom), New York, IEEE, vol. 1, Dec. 6, 1992, pp. 1493-1497.
Mannion P: “10-GBit Ethernet Switching Processor Blasts Barriers to the Backbone”, Electronic Design, Penton Publishing, Cleveland, vol. 48, No. 16, Aug. 7, 2000, pp. 72-74, 76, XP001076479.
“A High-Speed CMOS Circuit for 1.2-Gb/s 16×16 ATM Switching,” Alain Chemarin et al. 8107 IEEE Journal of Solid-State Circuits 27(Jul. 1992), No. 7, New York, US, pp. 1116-1120.
“Local Area Network Switch Frame Lookup Technique for Increased Speed and Flexibility,” 700 IBM Technical Disclosure Bulletin 38(Jul. 1995), No. 7, Armonk, NY, US, pp. 221-222.
“Queue Management for Shared Buffer and Shared Multi-buffer ATM Switches,” Yu-Sheng Lin et al., Department of Electronics Engineering & Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, R.O.C, Mar. 24, 1996, pp. 688-695.
“A 622-Mb/s 8×8 ATM Switch Chip Set with Shared Multibuffer Architecture,” Harufusa Kondoh et al., 8107 IEEE Journal of Solid-State Circuits 28(Jul. 1993), No. 7, New York, US, pp. 808-814.
“Catalyst 8500 CSR Architecture,” White Paper XP-002151999, Cisco Systems Inc. 1998, pp. 1-19.
“Computer Networks,” A.S. Tanenbaum, Prentice-Hall Int., USA, XP-002147300(1998), Sec. 5.2-Sec. 5.3, pp. 309-320.

Affiliated with

Also associated with

Rating

Linked network switch configuration does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Linked network switch configuration, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Linked network switch configuration will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3982134