Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2003-11-17
2008-08-05
Mai, Tan V. (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S303000
Reexamination Certificate
active
07409418
ABSTRACT:
An improved Finite Impulse Response (FIR) filter is presented which provides linear scalability and implementation without the need for delay lines. A multiprocessor architecture includes a plurality of ALUs (Arithmetic and Logic Unit), Multipliers units, Data cache, and Load/Store units sharing a common Instruction cache. A multi-port memory is also included. An assigning functionality assigns to each available processing unit the computation of specified unique partial product terms and the accumulation of each computed partial product on specified output sample values.
REFERENCES:
patent: 4541048 (1985-09-01), Propster et al.
patent: 5081604 (1992-01-01), Tanaka
patent: 5297069 (1994-03-01), Asato et al.
patent: 5594679 (1997-01-01), Iwata
patent: 5732004 (1998-03-01), Brown
patent: 6061521 (2000-05-01), Thayer et al.
patent: 6260053 (2001-07-01), Maulik et al.
patent: 6308191 (2001-10-01), Gay-Bellile
patent: 6546407 (2003-04-01), Jiang et al.
patent: 6571268 (2003-05-01), Giacalone et al.
patent: 2003/0065693 (2003-04-01), Nothlings et al.
patent: 0285316 (1988-10-01), None
patent: 0818740 (1998-01-01), None
Dick “The Scalability of Linear Filters on Hypercube Concurrent Computers”, Signals, Systems and Computers 1994, IEEE Comput. Soc. US., Oct. 31, 1994, pp. 1069-1073.
Wilkenson “Digital System Design,” 1987, Pretiss-Hall International, pp. 460-463 and 472-473.
Datasheet—TMS320C30 Digital Signal Processor, Texas Instruments, 1997.
Slump “Designand Implementation of a Linear-phase Equalizer in Digital Audio Signal Processing”: IEEE Workshop on VLSI Signal Processing V, Oct. 28, 1992, pp. 297-306.
Mou “Fast FIR Filtering: Algorithms and Implementations” Signal Processing, Amsterdam, NL, vol. 13, Dec. 1987 pp. 377-384.
European Search Report, for EP 03104135, dated Jul. 14, 2004.
Eyre, “The Evolution of DSP Processors” IEEE Signal Processing Magazine, Mar. 2000.
Sernec, “The Evolution of DSP Architectures: Towards Parallelism Exploitation” 10thMediterranean Electrotechnical Conference, 2000, vol. II pp. 782785.
Mou “A Study of VLSI Symmetric FIR Filter Structures” Journal of VLSI Signal Processing 4, Nov. 1992.
Deka, “A Comprehensive Study of Digital Signal Processing Devices” Microprocessors and Microsystems, vol. 19, No. 4 May 1995.
Maiti Srijib N.
Saha Kaushik
Gardere Wynne & Sewell LLP
Mai Tan V.
STMicroelectronics PVT. Ltd.
LandOfFree
Linearly scalable finite impulse response filter does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Linearly scalable finite impulse response filter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Linearly scalable finite impulse response filter will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4008657