Boots – shoes – and leggings
Patent
1995-07-24
1997-04-22
Coleman, Eric
Boots, shoes, and leggings
395412, 395800, 36424341, 3642565, 364DIG1, G06F 1210
Patent
active
056236190
ABSTRACT:
A microprocessor conforming to the X86 architecture is disclosed which includes a linearly addressable cache, thus allowing the cache to be quickly accessed by an external bus while allowing fast translation to a logical address for operation with functional units of microprocessor. Also disclosed is a microprocessor which includes linear tag array and a physical tag array corresponding to the linear tag array, thus allowing the contents of a microprocessor cache to be advantageously monitored from an external bus without slowing the main instruction and data access processing paths.
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Advanced Micro Devices , Inc.
Coleman Eric
Harrity John
Terrile Stephen A.
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