Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2006-03-21
2006-03-21
Jeanglaude, Jean Bruner (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S131000
Reexamination Certificate
active
07015851
ABSTRACT:
Linearizing analog to digital converter (ADC) performance using single-bit dither. Dither is summed with an input signal to an ADC by passing a serial pseudo-random bitstream through an analog filter. Dither is removed through applying correlation and digital filtering to the ADC digital output.
REFERENCES:
patent: 4903023 (1990-02-01), Evans et al.
patent: 4996530 (1991-02-01), Hilton
patent: 5189418 (1993-02-01), Bartz et al.
patent: 5926123 (1999-07-01), Ostrom et al.
patent: 6522276 (2003-02-01), Andre et al.
Donald E. Knuth, Stanford University—“The Art Of Computer Programming”, vol. 2/Seminumerical Algorithms; Chapter Three—Random Numbers; pp. 1-34, no date.
Xilinx—Application Note by Peter Alfke—“Efficient Shift Registers, LFSR Counters, And Long Pseudo-Random Sequence Generators”; XAPP 052 Jul. 7, 1996 (version 1.1); pp. 1-6.
Bruhns Thomas V.
Pursel Jason M.
Agilent Technologie,s Inc.
Jeanglaude Jean Bruner
Martin Robert T.
LandOfFree
Linearizing ADCs using single-bit dither does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Linearizing ADCs using single-bit dither, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Linearizing ADCs using single-bit dither will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3606569