Amplifiers – Hum or noise or distortion bucking introduced into signal...
Reexamination Certificate
2000-06-15
2002-06-04
Mottola, Steven J. (Department: 2817)
Amplifiers
Hum or noise or distortion bucking introduced into signal...
C330S145000
Reexamination Certificate
active
06400222
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a linearizer and more particularly to the linearizer connected to a front stage of a compensated circuit and is capable of compensating for an input-output characteristic of the compensated circuit.
2. Description of the Related Art
As mobile communication equipment operating in a microwave frequency band such as a portable communication device, satellite communication device or a like is widely used in recent years, a low distortion characteristic, in particular, is becoming a must of a high-frequency amplifier employed in such mobile communication equipment. However, since the high-frequency amplifier of this type exhibits a non-linear characteristic that, as an input power approaches a saturation region level, a gain is decreased and a passing phase turns to its positive side (the phase leads), it is difficult to achieve the low distortion characteristic in the high-frequency amplifier. A metal semiconductor transistor (MES) composed of a compound semiconductor, which is a kind of Field Effect Transistor (FET) and can provide a high speed operation and highly efficient operation in a high frequency region, is widely employed as an amplifying device constituting the high-frequency amplifier.
In order to achieve the low distortion characteristic in the high frequency amplifier, conventionally, nonlinearity of the high frequency amplifier is compensated for by connecting a compensating circuit. The compensating circuit, linearizer, exhibits a characteristic being approximately opposite to that described above that, as the input power approaches the saturation region level, the gain is increased and the passing phase turns to its negative side (the phase lags), in the, front stage of the high frequency amplifier.
FIG. 6
is a diagram explaining a principle in which the nonlinearity of the conventional high-frequency amplifier (a compensated circuit) is compensated for by the linearizer (a compensating circuit). A linearizer
60
is connected to the front stage of a high-frequency amplifier
50
which uses an FET
51
as the amplifying device. The FET
51
is used in a source-grounded manner in which its source electrode
51
S is connected to ground (GND). To a gate electrode
51
G is connected a gate resistor
53
which is also connected to a gate power source
52
(supplying, for example, −0.2 V to −0.1V). To a drain electrode
51
D is connected an inductor
55
which is also connected to a drain power source
54
(supplying, for example, +5.0V to +7.0V).
FIG. 7A
is a diagram explaining a principle in which the nonlinearity of the high-frequency amplifier
50
is compensated for by the linearizer
60
in FIG.
6
. As shown in
FIG. 7A
, the high-frequency amplifier
50
exhibits a characteristic that, as an input power Pin (on a horizontal axis) approaches the saturation region level, a gain G is decreased.
Therefore, by connecting the linearizer
60
exhibiting a characteristic that as the input power Pin approaches the saturation region level as shown in
FIG. 7B
, the gain G is increased, in the front stage of the high-frequency amplifier
50
, its synthetic gain characteristic becomes approximately linear as shown in FIG.
7
C.
FIGS. 8A
,
8
B and
8
C are diagrams explaining a principle in which the nonlinearity of the high-frequency amplifier
50
is compensated for by the linearizer
60
.
FIG. 8A
shows that, in the high-frequency amplifier
50
, as the input power Pin approaches the saturation region level, the passing phase P turns to its positive side. Therefore, by connecting the linearizer
60
exhibiting a characteristic that the input power Pin approaches the saturation region level as shown in
FIG. 8B
, the passing phase turns to its negative side; in the front stage of the high-frequency amplifier
50
, its synthetic gain characteristic becomes linear as shown in FIG.
8
C. This allows the nonlinearity of the high-frequency amplifier
50
serving as the compensated circuit to be compensated for by the linearizer
60
serving as the compensating circuit. This also serves to achieve the low distortion of the high-frequency amplifier
50
.
The conventional linearizer
60
has configurations as shown in
FIG. 5
, which is disclosed in a report “A simple-type linearizer loaded with a feedback device using a GaAsFET (Gallium Arsenide Field Effect Transistor)” (“Technical Report” issued by “The Institute of Electronic Information and Communication Engineers”, MW94-133, IDC94-208, 1995-01). In the linearizer
60
shown in
FIG. 5
, a source-grounded type FET
40
is used, a gate electrode
40
G of which is used as an input terminal, a drain electrode
40
D of which is used as an output terminal and an inductor
41
is connected between a source electrode
40
S and a GND. In the linearizer
60
, by operating the FET
40
as an active element to obtain the nonlinearity in mutual conductance “gm” and drain conductance “gd” in the non-linear region and by utilizing the inductor
41
, a gain is increased as its input power approaches a saturation region level and its passing phase is made to lag, which can compensate for the nonlinearity of the high-frequency amplifier
50
in its latter stage.
However, the conventional linearizer
60
described in the above literature has a problem in that the use of the FET
40
as the active element causes power consumption. That is, in the conventional linearizer
60
, since the nonlinearity of the mutual conductance “gm” and drain conductance “gd” in the non-linear region is obtained by operating the FET
40
as the active element, it cannot prevent power consumption causing a low rate of using a power source.
Furthermore, the above linearizer
60
presents a problem in that, since it has a bad input-output impedance and since its input-output impedance is changed greatly due to the input power level, a degradation in its reflection characteristic occurs. As a result, a connection of a matching circuit such as an isolating circuit or a like to its input-output terminal is required, causing a larger circuit scale. This causes not only difficulties in scaling down a circuit embedded with the linearizer
60
and high-frequency amplifier
50
and in making it lightweight but also a rise in costs caused by a calibration between circuits.
SUMMARY OF THE INVENTION
In view of the above, it is an object of the present invention to provide a linearizer capable of scaling its circuit down and making it lightweight, of lowering its power consumption and of facilitating an input-output calibration.
According to a first aspect of the present invention, there is provided a linearizer for compensating for a characteristic of a compensated circuit, having a characteristic being approximately opposite to an input-output characteristic of the compensated circuit and being connected to a front stage of the compensated circuit, including:
a reactance element connected between one terminal of a variable resistance element and a GND; and
a T-type attenuator whose shunt is connected to an other terminal of the variable resistance element.
According to a second aspect of the present invention, there is provided a linearizer for compensating for a characteristic of a compensated circuit, having a characteristic being approximately opposite to an input-output characteristic of the compensated circuit and being connected to a front stage of the compensated circuit, including:
a reactance element connected between one terminal of a variable resistance element and a GND; and
a &pgr;-type attenuator whose shunt is connected to an other terminal of the variable resistance element.
According to a third aspect of the present invention, there is provided a linearizer for compensating for a characteristic of a compensated circuit, having a characteristic being approximately opposite to an input-output characteristic of the compensated circuit and being connected to a front stage of the compensated circuit, including:
first and second resistors each being connec
Mottola Steven J.
Rosenman & Colin LLP
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