Linearized three state phase detector

Details Linearized three state phase detector Linearized three state phase detector

1990-03-28

1990-11-13

Mis, David

Oscillators

Automatic frequency stabilization using a phase or frequency...

With reference oscillator or source

331 1A, 307528, 328133, H03L 7089

Patent

active

049704753

ABSTRACT:
A linearized three state phase detector (300) that exhibits a linear transfer function of phase to current or charge at and around the zero phase error region. The inputs to the D flip-flops (301 and 302) are tied to a logic high. the first flip-flop (301) is clocked with reference signal F.sub.r while the other flip-flop (302) is clocked with a variable frequency feedback signal F.sub.v. F.sub.v is typically from a voltage controlled oscillator in a phase locked loop. The outputs of the flip-flops are ANDed together with the result of this operation going through a delay element (304) before reseting one of the flip-flops (301). The other flip-flop (302) is reset by the output of the AND gate (304) without the delay element (304). Each flip-flop output enables a charge pump--one negative polarity (306) and one positive polarity (305). The present invention will maintain a lock condition in a phase locked loop by extending the DOWN pulse enabling the negative polarity charge pump (306) to the same width as the UP pulse that enables the positive pump (305). This will create a net zero charge from the present invention.

REFERENCES:
patent: 3958186 (1976-05-01), Jesse et al.
patent: 4244043 (1981-01-01), Fujita et al.
patent: 4378509 (1983-03-01), Hatchett et al.
patent: 4764737 (1988-08-01), Kaatz

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