Linearized storage cell for integrated circuit analog signal rec

Details Linearized storage cell for integrated circuit analog signal rec Linearized storage cell for integrated circuit analog signal rec

1997-09-08

1998-11-10

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

3651852, G11C 1134

Patent

active

058354123

ABSTRACT:
The present invention is a method and apparatus for reading a storage cell configured in a negative feedback mode to provide linear variation of cell current with the threshold of the cell. The apparatus comprises a floating gate storage cell having a source, a gate, a floating gate and a drain. The source of the floating gate storage cell has a first predetermined reference voltage and the gate of the floating gate storage cell has a predetermined second reference voltage. The apparatus also comprises first circuitry driving the voltage on the drain of the floating gate storage cell to a third predetermined reference voltage, the first, second and third predetermined reference voltages being selected to not change a threshold voltage of the storage cell. The apparatus further comprises second circuitry providing an output proportional to the current passing through the floating gate storage cell while the first, second and third predetermined reference voltages are applied.

REFERENCES:
patent: 5055897 (1991-10-01), Canepa et al.
patent: 5220531 (1993-06-01), Blyth et al.
patent: 5253201 (1993-10-01), Atsumi et al.
patent: 5467306 (1995-11-01), Kaya et al.
patent: 5694356 (1997-12-01), Wong et al.

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