Linearization of a PDM Class-D amplifier

Details Linearization of a PDM Class-D amplifier Linearization of a PDM Class-D amplifier

2003-01-06

2004-08-03

Nguyen, Patricia (Department: 2817)

Amplifiers

Modulator-demodulator-type amplifier

C330S251000, C330S20700P

Reexamination Certificate

active

06771121

ABSTRACT:

BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to a Class-D Power Amplifier, and more particularly, to a Class-D Power Amplifier having a pulse coded digital input signal and typically using an H-Bridge to drive an output load, like a loudspeaker.
(2) Description of the Prior Art
Class-AB amplifiers are notoriously inefficient and Class-D amplifiers overcome this shortfall. With Class D amplifiers, the output is made to switch between the two output levels at a very high frequency—substantially higher than the highest audible frequency, which is done by feeding high-frequency pulses to the power amplification stage. The pulse-density ratio of the driving signal can be varied in order to make the averaged (filtered) output signal follow the (amplified) input signal very closely; such amplifier is referred to as pulse density modulated (PDM). Similarly, the amplifier input signal could also be pulse width modulated (PWM), were the width of pulses is varied to make the averaged (filtered) output signal follow the input signal. The output voltage at the load represents the input signal correct as long as the supply voltage is perfectly constant. However the amplitude of the switched voltage is in real life not fixed. Class D power stages per se have no power supply ripple rejection. In addition switch-induced ringing on the power supply and the voltage drop at the power driver devices similarly cause amplitude errors.
FIG. 1
prior art shows a schematic block diagram of a state-of-the-art PDM Class-D Amplifier. It typically comprises a Sigma Delta Modulator, or a similar converter, to generate the driving signal for the Class-D power output stage, which is typically an H-Bridge and a loudspeaker.
FIG. 2
prior art shows a simplified diagram of an H-Bridge. If Transistors T
1
and T
4
are closed and Transistors T
2
and T
3
are open, the voltage at the load LOAD is (approximately)+V-Supply. If Transistors T
2
and T
3
are closed and Transistors T
1
and T
4
are open, the voltage at the load LOAD is (approximately)−V-Supply. If Transistors T
2
and T
4
are closed and Transistors T
1
and T
3
are open, the voltage at the load LOAD is (approximately) zero. This shows, the voltage across said load LOAD can take one of three states: +V-Supply, −V-Supply or zero.
U.S. Pat. No. (6,346,852 to Masini et al) describe a class D amplifier including an input integrating stage and a modulating stage for modulating the integrated input signal output by the integrating stage. The modulating stage uses as a carrier an alternate waveform of a frequency sufficiently higher than the frequency band of the analog input signal. The modulating stage further outputs a digital signal switching between a positive voltage and a negative voltage, and whose average value represents an amplified replica of the input analog signal. The class D amplifier further includes an output power stage producing an output digital signal. A feedback line including a resistor is connected between the output of the output power stage and an input node of an operational amplifier. The class D amplifier also includes a low-pass filter reconstructing an output analog signal, and a delay stage. The delay stage is functionally coupled in the direct path of propagation of the digital signal from the output of the modulating stage to an input of the output power stage. The delay stage delays the digital signal from the output of the modulating stage by a delay. The value of the delay is defined as a function of a desired broadening of the bandwidth and in consideration of the corresponding restriction of the range of variation of the duty cycle of the output digital signal.
U.S. Pat. No. (5,847,602 to Su, David) shows a delta-modulated magnitude amplifier which is used to amplify the magnitude component of an RF power amplifier that employs envelope elimination and restoration. The delta-modulated amplifier introduces a smaller amount of non-linearity than traditional approaches, which are based upon pulse-width modulation. The disclosed technique can be implemented using switched-capacitor circuits in a standard MOS technology with only two external components, i.e., an inductor and a capacitor. Thus, the disclosed technique allows the implementation of an efficient and yet linear RF power amplifier using low-cost MOS technology.
U.S. Pat. No. (6,191,650 to Backram, et al) describes a class D amplifier in which a high-frequency reference signal is pulse width modulated by an input signal and in which there are generated a pair of bipolar pulse drive signals, comprising an error generator which forms a signal with an average value which corresponds to the DC component of the pulse drive signals, and which is fed back to the pulse width modulator for the adjustment of the modulator.
SUMMARY OF THE INVENTION
A principal object of the invention is to linearize the characteristic of a Class-D power output stage. Such amplifiers typically use an H-Bridge to drive an output load, like a loudspeaker. If the supply voltage for the amplifier and other operating conditions are not constant, this will result in output signal distortion. A basic requirement is therefore to compensate for the pulse area error, caused by the variations in the supply voltage and other deviations.
A fundamental idea is to keep the time-voltage area of every pulse constant. To achieve this, the circuit first determines the ideal pulse area and then determines the optimized pulse width, based on said deviation of the supply voltage and of certain other operating conditions.
A “Length of Pulse Integrator” Function takes the actual supply voltage and starts integrating it, beginning at each start point of the input signal pulse. When the integrated value reaches a specific reference level, which represents the desired time-voltage area, the integration stops the output signal pulse.
To compensate not only for power supply variations, but also for e.g. the varying voltage drop across the output devices, the input voltage to the integrator should be taken from the actual voltage across the output load.
In accordance with the objectives of this invention, a circuit for linearization of output pulses in a Class-D Amplifier comprises a unit to convert the input into PDM (Pulse Density Modulated) control pulses, typically a Sigma Delta Modulator. The circuit also comprises a “Pulse Generator Unit” inserted into the signal path between said converter of PDM signals and the Class-D output power stage, which is, as said before, typically an H-Bridge. Said H-Bridge drives voltage into said output load, like a loudspeaker.
The key element of this invention is the “Length of Pulse Integrator”, which comprises an integrator for a signal, representing the actual voltage across the output load and a unit to determine the proper reference level. Further it comprises a logic function to produce the optimum pulse width, providing the correct stop signal for the output pulse, which it feeds into said “Pulse Generator Unit”.
In accordance with the objectives of this invention, a method for linearization of output pulses in a Class-D Amplifier is implemented. First it integrates a signal, representing the actual voltage across the output load. Then it determines the proper reference level. Further, it determines the correct stop signal for the output pulse and feeds the resulting control signal into said “Pulse Generator Unit”.
Further, in accordance with the objectives of this invention, said pulse area reference level may not only be of fixed level, but may also be externally controlled.


REFERENCES:
patent: 5506532 (1996-04-01), Milazzo
patent: 5777512 (1998-07-01), Tripathi et al.
patent: 5847602 (1998-12-01), Su
patent: 5878146 (1999-03-01), Andersen
patent: 6191650 (2001-02-01), Backram et al.
patent: 6232833 (2001-05-01), Pullen
patent: 6346852 (2002-02-01), Masini et al.
patent: 0503571 (1992-09-01), None
patent: 1049247 (2000-02-01), None
patent: 1184973 (2002-06-01), None
US Publication Patent # US 2003/0087621 A1 of

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