Data processing: generic control systems or specific application – Generic control system – apparatus or process – Sampled data system
Reexamination Certificate
1999-04-16
2004-02-03
Picard, Leo (Department: 2125)
Data processing: generic control systems or specific application
Generic control system, apparatus or process
Sampled data system
C341S155000
Reexamination Certificate
active
06687555
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
The present application is related to, and claims priority from, Japanese Patent Application Nos. Hei. 10-110957 and Hei. 10-278747, the contents of which are incorporated herein by reference.
BACKGROUND OF THE PRESENT INVENTION
1. Technical Field
The present invention relates generally to pulse-width modulated controls, and more particularly to controlling current to a linear solenoid in an electromagnetic-type solenoid or actuator to regulate the degree of opening of the solenoid or the amount of actuator displacement of a driven target.
2. Related Art
Linear solenoids are provided in conventional solenoids or actuators to regulate actuation of the solenoid/actuator by regulating the amount of current flow to the solenoid/actuator. In turn, current flow to the linear solenoid is typically controlled by connecting the inductive load of the linear solenoid to a direct-current power source across a switching element, such as a conducting unit including a transistor, and then switching the element on and off via controlled duty pulse-width-modulated signals.
When it is necessary to accurately control the opening degree of the solenoid or the amount of displacement of the driven target, current flowing to the linear solenoid inductive load is detected, and current feedback is performed to increase or reduce the duty of the pulse-width-modulated signals to the switching element so that the detected current value converges to a calculated target current.
Herein, in an inductive load conductivity controller that performs the above-described current control according to the prior art, a processing portion including a central processing unit (CPU) calculates the duty of the pulse-width-modulated signals at each iteration of a predetermined processing cycle. A pulse-width-modulated signal-output portion including a logic circuit and provided separately from the processing portion outputs signals to the switching element at a duty calculated by the processing portion.
More particularly, the processing portion determines the time per pulse-width-modulated signal cycle to switch the switching element on or off based on the calculated duty, and stores data representing the time in a RAM. Meanwhile, the signal-output portion includes a counter to repeatedly clock one cycle of pulse-width-modulated signals, and a register to which data stored in the specific address in the RAM is sent. The signal-output portion generates and outputs the pulse-width-modulated signal of the duty calculated by the CPU by repeating operation wherein a pulse-width-modulated signal goes to a high level (or to a low level) at the start of one cycle of a pulse-width-modulated signal detected based on the value of a counter. Correspondingly, the output portion sends the data stored in the specific address in the RAM by the processing unit to the register, and inverts the output level of the pulse-width-modulated signal when the value of a counter reaches the data value in the register.
Accordingly, pulse-width-modulated signals having a desired duty can be output to the switching element as drive signals, with no need for the processing portion to execute complex output signal processing.
However, in the above-described conventional pulse-width-modulated signal-output portion, a maximum time of one pulse-width-modulated signal cycle is required until the duty calculated by the processing portion is actually reflected in the drive for the switching element. Therefore, the actual responsiveness that can be effected when controlling the current to the inductive load is limited. That is to say, the pulse-width-modulated signal-output portion is structured so that, at the start point of one pulse-width-modulated signal cycle, the pulse-width-modulated signal-output portion transfers the data stored in the specific address of the RAM at that time to its own register. Because of this, even when the processing portion calculates the newest duty and stores the data corresponding thereto in the specified address in the RAM during one pulse-width-modulated signal cycle, the newest data is reflected only in the next pulse-width-modulated signal cycle.
To overcome the above limitation, Japanese Patent Application Laid-open No. Hei 10-2248 proposes an apparatus to monitor whether data in the foregoing specific address in the RAM has been updated by the processing portion during the interval from initiation of clocking of one pulse-width-modulated signal cycle by the counter until initiation of clocking of the next cycle. Accordingly, when a data update is detected, the apparatus transfers the updated data from the RAM to its own register, while continuously comparing the value of the counter with the data value within the above-mentioned register. When the counter value has not reached the value of the data in the register, the apparatus causes the pulse-width-modulated signals to go to one level. When the value has reached the value of the data in the register, the apparatus causes the signals to go to the other level.
Although the newest data stored at a specific address in the RAM can immediately be reflected in the duty of the pulse-width-modulated signals, the signal level may change three or more times during a single pulse-width-modulated signal cycle. As such, during one pulse-width-modulated signal cycle, after the signal level has already been reflected, the signal level is returned to its original level, and thereafter is again reflected. As a result, the pulse-width-modulated signal cycle may be disturbed.
That is to say, the signal level of the pulse-width-modulated signals ordinarily changes twice during one cycle thereof, from low to high and from high to low. However, changing of the signal level three or more times signifies a change in the pulse-width-modulated signal cycle itself. Accordingly, in a conductivity controller of the type presently discussed, the cycle of the pulse-width-modulated signals output to the switching element is established at an optimal value for adjusting the amount of displacement of the drive target, such as a solenoid or an actuator. Therefore, when division from the cycle occurs, controllability of the drive target is decreased.
Meanwhile, Japanese Patent Application Laid-open No. Hei. 6-30594, for example, describes an apparatus for generating a delta wave of the same cycle as a pulse-width-modulated signal, together with a pulse-width-modulated signal having a corresponding to a threshold value Vth. The apparatus accomplishes this by comparing the sizes of the level of the delta wave and a threshold value Vth proportional to the high-level time during one pulse-width-modulated signal cycle, and making the pulse-width-modulated go high when the level of the delta wave is the threshold value Vth or less, or otherwise making the pulse-width-modulated signal go low, as shown in FIG.
18
. In the “PWM signal” entry of
FIG. 18
, “ON” indicates a high level and “OFF” indicates a low level.
Accordingly, even when pulse-width-modulated signals are generated by such a method, as shown on the right-hand half of
FIG. 18
, when the change timing of the threshold value Vth occurs any number of times in a single pulse-width-modulated signal cycle, disturbance occurs in the cycle of the output signals, and the controllability of the drive target decreases, as shown by the ellipse in FIG.
18
.
Additionally, the above-described Japanese Patent Application Laid-open No. Hei. 6-30594 describes a structure for suppressing fluctuation of the threshold value Vth compared with the delta-wave level by a lag circuit to prevent such a problem. However, as a result of the suppression, a decline occurs even in the original reflection speed with respect to the duty of the pulse-width-modulated signals. Thus, current control responsiveness is negatively affected.
In addition, when performing the above-discussed current feedback, it is necessary to detect the load current. However, because this current flows through the switching element which is cyclically switched on
Honda Takayoshi
Kamiya Takamichi
Denso Corporation
Garland Steven R.
Harness Dickey & Pierce PLC
Picard Leo
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