Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement
Reexamination Certificate
2002-07-16
2004-09-07
Nguyen, Long (Department: 2816)
Amplifiers
With semiconductor amplifying device
Including particular biasing arrangement
C330S285000
Reexamination Certificate
active
06788150
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of radio frequency power amplifiers, and more particularly to power amplifiers used in cellular radio handsets.
BACKGROUND OF THE INVENTION
A Linear Power Amplifier (LPA) is typically biased with a biasing circuit about an operating point, which allows a linear relation between input signal and amplified output signal. In class “A” or “AB” linear operation, this bias ordinarily establishes a quiescent current passing through the power transistor. While other amplifier modes are theoretically possible, these create various distortions of the signal. Thus, both cost and complexity considerations typically point toward a class “A” or “AB” amplifier topology. See, U.S. Pat. No. 6,333,677 and U.S. Pat. No. 6,043,714, expressly incorporated herein by reference.
E. Jarvinen, S. Kalajo, M. Matilainen, “Bias Circuits for GaAs HBT Power Amplifiers”, 2001 IEEE MTT-S describes a typical known power amplifier design.
According to known class “A” or “AB” radio frequency power amplifier designs, the signal at the collector of the power output transistor must be isolated from the power supply (Vcc), and therefore a sufficiently large inductor is selected to present a high impedance in the operating band, while supplying power to the output. Typically, large inductances require physically large devices, due to the requirement for an increased length of conductor. Further, this inductor must be able to handle the full current passing through the transistor, requiring a significant bulk of conductor. Thus, the known systems require large inductors, which, in turn, are difficult to integrate into a power amplifier module and ultimately an integrated circuit. Therefore, one deficiency of the prior art teachings is to effectively minimize the required inductance, and therefore size of the inductor, while maintaining high isolation. See U.S. Pat. No. 6,333,677 and U.S. Pat. No. 6,313,705, each of which is expressly incorporated herein by reference. In addition, in Class AB operation, as the device is more efficient but less linear, the RF amplifying device requires for improved linearity, a short or quasi-short present at the 2
nd
Harmonic frequency. This can not be provided by the use of an inductance (choke) at the collector. And typically the short needs to be provided using extra components and/or more complex matching network.
An alternative technique employs a transmission line to isolate the collector. While this technique avoids the bulky inductor, the transmission line itself has a significant physical size, and poses a similar dilemma.
In many high frequency operation LPAs, silicon semiconductor technologies typically have insufficient gain, efficiency, linearity and high noise to meet competitive requirements. Therefore, other semiconductor technologies, such as GaAs (AlGaAs or InGaP), InP, SiGe and the like have been proposed and increasingly adopted. Typically, these are hetero-junction bipolar transistors (HBT), but may also be Metal Silicon Field Effect Transistors (MESFET) or High Electron Mobility Transistors (HEMT).
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a LPA (Linear Power Amplifier) having a reduced collector isolator inductor maximum size and/or inductance, by forming a network of components which together provide the desired impedance over a broad frequency range including the operating band, base band and the 2
nd
harmonic.
Preferably, this is accomplished at the collector, by providing a principal choke circuit, having a resonance frequency corresponding to the operating band, as well as a second resonant frequency corresponding to the second order harmonic of the operating band, the second order harmonic preferably depending on circuit inductances which are otherwise considered parasitic, for example the inductance of a tank circuit capacitor, therefore reducing component count and complexity. This permits a reduction in the size of the main inductor, which in turn allows higher levels of integration in a LPA module. This also permits a definitive increase in efficiency and linearity performance by the provision of the proper 2
nd
Harmonic loading.
It is further an object of the invention to provide, at the base of the operating devices, a bias circuit for an LPA having a plurality of operating modes, each respective mode being generally defined by operation at a different quiescent current, wherein the higher current modes would provide higher linearity and gain for the higher operating power levels, and the lower current modes would provide increased efficiency by lowering the current drawn from the battery. The bias circuit is compensated for changes due to temperature (ideally a constant device current), while maintaining low noise performance and providing good Power Amplifier linearity.
Typical bias circuits balance a compromise between linearity performance, temperature compensation and noise. Further, in a multimode communications device, the bias circuit also needs to accommodate several operating modes such as power level and burstiness. For example, in typical CDMA systems, the dynamic range is on the order of 60 dB.
The main power transistor of the LPA suffers from changes in both Vbe and Hfe with temperature. In order to compensate for changes in Vbe, the bias circuit may include a stack of semiconductor junctions; however, in the case of a GaAs device operating on a 3.2V minimum battery supply (Vcc), this stack is limited to 2·Vbe, and consequently the bias circuit needs to remain fairly simple. In order to compensate for changes in Hfe (current gain), the current flowing into the HBT base must be controlled. According to the present invention, it has been found that the impedance (generally in the form of a resistor) between the emitter follower circuit and the bias diode is essential to a balanced performance over the full range of temperatures, its value is also directly correlated to the Noise floor at the output of the PA.
Preferably, a current mirror is provided, to feed back the current to the base of the emitter follower circuit, resulting in improved temperature response behavior. Typically, this allows all essential requirements (e.g. noise, linearity, and temperature compensation), to be met simultaneously.
As the PA will need to operate over a very broad dynamic range, it is seen that by selecting the operating mode, thus adjusting the quiescent current of the LPA, the performance, can be readily controlled. By automatically adjusting the operating point based on temperature changes, the gain within a selected mode may be maintained.
According to the IS95 specification, the ACPR must be limited to less than or equal to about −45 dBc/30 KHz firm. According to the present invention, appropriate linear behaviour is achieved through proper decoupling of stages and implementation of a bias circuit described herein.
The Output Noise Floor in receive band, particularly relevant for receiver sensitivity, should be less than or equal to about −136 dBm/Hz. The bias circuit is optimized to achieve this design parameter, in particular the selection of a noise-attenuating resistor.
When resistor selection is not enough (i.e. for a closed loop bias circuit) or as an alternative noise reduction method, the bandwidth of the bias circuit needs to be further limited to a frequency below the receive band separation from the transmit band, but higher than the baseband frequency. High bandwidth bias circuits generate excessive noise at frequencies that are later mixed in the receive band, doing so limits the noise generated at the output of the LPA. However the bandwidth should not be reduced below baseband frequencies, so that the linearity of the LPA remains unaffected. The location of the bandwidth limitation devices (typically capacitors) should be specifically chosen to limit the noise and is critical to a successful noise reduction. Using either or both methods, the noise generated by the bias circuit can be removed below the noise generated by
Hug John
Joly Christophe
Keenan Richard
Halajian Dicran
Koninklijke Philips Electronics , N.V.
Nguyen Long
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