Linear phase detector and charge pump

Oscillators – Automatic frequency stabilization using a phase or frequency... – With reference oscillator or source

Reexamination Certificate

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C331S00100A, C327S002000, C327S012000, C375S375000

Reexamination Certificate

active

07400204

ABSTRACT:
A phase detector detects a phase difference between a first and second signal received by a phase detector. A charge is supplied by a charge pump circuit that corresponds to the phase difference using a phase difference to charge conversion that is substantially linear and nonzero in a phase error region that includes a phase error transition region around a phase error of zero having both negative and positive phase error values. Dual determinations, q1 and q2, offset from each other are made of an appropriate charge for a given phase error between the first and second signals. The charge pump supplies as the total charge pump output a charge value representing a combination of q1 and q2, thereby providing a phase error to charge conversion that is substantially linear in the phase error transition region around zero. A first and second output of the phase detector circuit respectively supplying UP and DOWN signals to the charge pump circuit are delayed and supplied as additional outputs of the phase detector circuit and used in generating the dual charge determinations q1 and q2.

REFERENCES:
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Novof, Illya I., et al., “Fully Integrated CMOS Phase-Locked Loop with 15 to 240 MHz Locking Range and +/−50 ps Jitter,” IEEE Journal of Solid-State Circuits, vol. 30, No. 11, Nov. 1995, pp. 1259-1266.

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