Oscillators – Automatic frequency stabilization using a phase or frequency... – With reference oscillator or source
Reexamination Certificate
2008-07-15
2008-07-15
Pascal, Robert J. (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
With reference oscillator or source
C331S00100A, C327S002000, C327S012000, C375S375000
Reexamination Certificate
active
07400204
ABSTRACT:
A phase detector detects a phase difference between a first and second signal received by a phase detector. A charge is supplied by a charge pump circuit that corresponds to the phase difference using a phase difference to charge conversion that is substantially linear and nonzero in a phase error region that includes a phase error transition region around a phase error of zero having both negative and positive phase error values. Dual determinations, q1 and q2, offset from each other are made of an appropriate charge for a given phase error between the first and second signals. The charge pump supplies as the total charge pump output a charge value representing a combination of q1 and q2, thereby providing a phase error to charge conversion that is substantially linear in the phase error transition region around zero. A first and second output of the phase detector circuit respectively supplying UP and DOWN signals to the charge pump circuit are delayed and supplied as additional outputs of the phase detector circuit and used in generating the dual charge determinations q1 and q2.
REFERENCES:
patent: 4935707 (1990-06-01), Irwin
patent: 4970475 (1990-11-01), Gillig
patent: 5926041 (1999-07-01), Duffy et al.
patent: 6011822 (2000-01-01), Dreyer
patent: 6169458 (2001-01-01), Shenoy et al.
patent: 6515536 (2003-02-01), Liang et al.
patent: 6747506 (2004-06-01), Thiara
patent: 7082176 (2006-07-01), Chien et al.
patent: 7092475 (2006-08-01), Huard
patent: 2005/0185747 (2005-08-01), White
patent: 2006/0220711 (2006-10-01), Sanduleanu et al.
Novof, Illya I., et al., “Fully Integrated CMOS Phase-Locked Loop with 15 to 240 MHz Locking Range and +/−50 ps Jitter,” IEEE Journal of Solid-State Circuits, vol. 30, No. 11, Nov. 1995, pp. 1259-1266.
Spencer Ronald G.
Thomsen Axel
Gannon Levi
Pascal Robert J.
Silicon Laboratories Inc.
Zagorin O'Brien Graham LLP
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