Linear multiplier circuit

Details Linear multiplier circuit Linear multiplier circuit

2006-03-07

2006-03-07

Nguyen, Long (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific input to output function

Combining of plural signals

C708S835000

Reexamination Certificate

active

07009442

ABSTRACT:
A linear multiplier circuit comprises a first, a second, a third and a fourth transistor, each having a drain, a source, a gate and substantially an identity threshold voltage. Each of these four transistors operates with a fixed drain-to-source voltage applied between the drain and source, a gate-to-source voltage applied between the gate and source. The sources of the first and second transistors, and the drains of the third and fourth transistors are coupled to form the output terminal. The gate-to-source voltages of the first, second, third and fourth transistor are respectively the sum of the first and second input signals, an additionally introduced input signal, and the identity threshold voltage; the sum of the additionally introduced input signal and the identity threshold voltage; the sum of the first input signal, the additionally introduced input signal and the identity threshold voltage; and the sum of the second input signal, the additionally introduced input signal and the identity threshold voltage.

REFERENCES:
patent: 4387439 (1983-06-01), Lin
patent: 2004/0174202 (2004-09-01), Behzad

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