Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Patent
1992-08-20
1994-04-19
Sikes, William L.
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Field effect transistor
257194, 257195, H01L 31072, H01L 31109, H01L 310328, H01L 310336
Patent
active
053048253
ABSTRACT:
A low power heterojunction field effect transistor (10, 30, 50, 60) capable of operating at low drain currents while having a low intermodulation distortion. A channel restriction region (9, 38, 51) is formed between the gate electrodes (24, 41, 69) and the drain electrodes (25, 46, 65). The channel restriction region (9, 38, 51) depletes the channel layer (13, 33) thereby constricting a channel and lowering a drain saturation current. The channel restriction region (9, 38, 51) may be used to set a desired drain saturation current such that a second derivative of the transconductance with respect to the gate-source voltage is approximately zero and a first derivative of the transconductance with respect to the gate-source voltage is, approximately, a relative maximum at the desired operating point.
REFERENCES:
patent: 4942438 (1990-06-01), Miyamato
patent: 5091759 (1992-02-01), Shih et al.
patent: 5140386 (1992-08-01), Huang et al.
patent: 5159414 (1992-10-01), Izumi et al.
Goronkin Herbert
Nair Vijay K.
Tehrani Saied N.
Vaitkus Rimantas L.
Abraham Fetsum
Barbee Joe E.
Dover Rennie William
Motorola Inc.
Sikes William L.
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