Electrical pulse counters – pulse dividers – or shift registers: c – Shift register – Particular input circuit
Patent
1991-01-22
1992-02-18
Miller, Stanley D.
Electrical pulse counters, pulse dividers, or shift registers: c
Shift register
Particular input circuit
307 81, 307 73, G01R 3128
Patent
active
050900358
ABSTRACT:
A linear feedback shift register comprises a shift register formed of first to (n)th flipflops cascaded in such a manner that an output of a (i)th flipflop is connected to an input of a (i+1)th flipflop, where 2.ltoreq.n and 1.ltoreq.i.ltoreq.(n-1). First to (n)th output terminals are connected to outputs of the first to (n)th flipflops, respectively, and a clock terminal connected to a clock input of each of the flipflops. First to (n-1)th multiplexors of a "1-out-of-2" type are connected at their first input to a common preset value input terminal. Second inputs of the first to (n-1)th multiplexors are connected to the outputs of the first to (n-1)th flipflops, respectively. Each of the first to (n-1)th multiplexors has a control input connected to an individual control terminal. First to (n-1)th exclusive-OR gates are cascaded in such a manner that a first input of a (n-1)th exclusive-OR gate is connected to the output of the (n)th flipflop, a first input of an (i)th exclusive-OR gate is connected to an output of an (i+1)th exclusive-OR gate, and an output of the first exclusive-OR gate is connected to an input of the first flipflop. A second input of the (i)th exclusive-OR gate is connected to an output of the (i)th multiplexor. With this arrangement, a generator polynomial generated by the linear feedback shift register can be modified by controlling the multiplexors through the individual control terminals.
REFERENCES:
patent: 3736514 (1973-05-01), Lee
patent: 4876704 (1989-10-01), Ozaki
Miller Stanley D.
NEC Corporation
Tran Sinh N.
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