Linear AGC circuit with controlled duty cycle sampling means

Details Linear AGC circuit with controlled duty cycle sampling means Linear AGC circuit with controlled duty cycle sampling means

1974-08-14

1976-06-15

Rolinec, R. V.

Amplifiers

With control of power supply or bias voltage

325408, 328151, 328168, 330 10, H03G 300

Patent

active

039639924

ABSTRACT:
An intermodulation distortion analyzer generates two pairs of sinusoidal test tones to serve as a test signal for the channel under test. The two pairs of tones simulate two respective noise band test signals but eliminate the long time averaging required for measurements when noise bands are used. A highly linear AGC circuit employs sampling at an output-controlled duty cycle to maintain a constant reference level for the analyzer. This reference level permits automatic distortion measurements to be read out directly in db below the test signal. An RMS detector circuit for second order intermodulation products employs feedback control to maintain the input signal to a squaring circuit constant. Squaring of the constant level sinusoids produces RMS DC components which can be separated for direct measurement. A distortion circuit provides known levels of second and third order intermodulation in the test signal to permit accurate check out of the analyzer.

REFERENCES:
patent: 2974224 (1961-03-01), Ule
patent: 3493875 (1970-02-01), Stuckert

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