Line precharging circuits and methods

Details Line precharging circuits and methods Line precharging circuits and methods

1991-09-27

1992-10-27

Mis, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307246, 307572, 307481, H03K 1716, H03K 1996

Patent

active

051592100

ABSTRACT:
A bus precharge circuit is provided that precharges a bus line or node as an inverse function of the precharge level already attained on the bus line, such that the precharge level on the bus line is gradually approached. The precharge circuit charges the bus line to a midpoint between high and low logic states. The preexisting state of the bus line is stored and is used to select one of two voltage supplies to which the bus line may be partially pulled up or down. The switchpoint of a precharge circuit sensing gate is set to be equivalent to the switchpoint of the receiving gate of receiver on the bus line.

REFERENCES:
patent: 4763023 (1988-08-01), Spence
patent: 4983860 (1991-01-01), Yim et al.
patent: 4988888 (1991-01-01), Hirose et al.
Bakoglu, H. B. et al., "CMOS Driver and Receiver Circuits for Reduced Interconnection Delay", International Symposium On VLSI Technology, Systems and Applications, pp. 171-175, Taipei, Taiwan, May 1985.

Affiliated with

Also associated with

Rating

Line precharging circuits and methods does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Line precharging circuits and methods, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Line precharging circuits and methods will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-907489