Line interface for a data transmission network

Excavating

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371 295, 371 62, H04L 2502, H04L 1240

Patent

active

052672514

ABSTRACT:
A line interface for a two wire bus for detecting defects of the bus. The interface includes a shaping circuit having three comparators. The first comparator having two inputs connected to the two wires of the bus, the second comparator having a first input connected to one of the bus wires and another input connected to a reference signal, and the third comparator having a first input connected to the other wire of the bus and the second input connected to a reference signal. A first counter is connected to the output of the first comparator and counts a number of transitions which occur on the bus during a predetermined period of time. If the number of transitions detected by the first comparator is counted to be less than a predetermined number of transitions, the bus is defective. The second and third counters are respectively connected to the second and third comparators. Each of the second and third counters have inputs connected to outputs of the respective comparators and count the number of transitions on the output of the respective comparators. Each time there is a transition on the output of the second or third comparator, the third or second counter is reset. The comparators and counters are connected to circuitry which analyzes signals from the comparators and counters to determine defects on the bus and allow the transmission of data on only one of the bus wires if the other is defective.

REFERENCES:
patent: 4545055 (1985-10-01), Patel
patent: 4551671 (1985-11-01), Annunziata et al.
patent: 4782300 (1988-11-01), Bonaccio et al.

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