Static information storage and retrieval – Format or disposition of elements
Reexamination Certificate
2003-07-01
2004-12-28
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Format or disposition of elements
C365S063000, C365S230060
Reexamination Certificate
active
06836421
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to memory, and more specifically to memory employing a cross point array.
2. Description of the Related Art
A random access memory (“RAM”) type of memory is typically associated with the main memory available to computer programs and similar devices. RAM type memory is often contrasted with a read-only memory (“ROM”) type of memory, which is typically associated with a special memory that is either not changed, or changed relatively infrequently. RAM mostly comprises SRAM and DRAM. ROM mostly comprises Flash memory, EPROM, OTP, EEPROM, PROM and ROM. Some devices such as NovRAM and Battery powered SRAM are hybrid devices using more than one technology.
Although SRAM is the memory of choice for computer applications, with very fast access times, its volatility, large size and stand-by current limit the total size and applications of the memory. Nonvolatile memories such as Flash memory are slower to program, and in some case must be erased a large block at a time before being reprogrammed. DRAM has the smallest cell size, but necessitates a complex refresh algorithm, and is volatile. For new applications, away from PC applications and into portable applications such as cell phones, personal digital assistants (PDA), digital cameras, camcorders, removable “key-chain” or “USB” disks, the key issues are nonvolatility and low power consumption.
Regardless of how the memory is used, RAM and ROM overlap in many respects. Both types of memory can allow random access reads. Both types of memory can be relatively fast or relatively slow. Although all ROMs are non-volatile, so are some RAMs. Although most ROMs cannot change their data once programmed, some ROMs can be re-programmed. RAM, however, is always re-writable.
The ROMs that are capable of modifying their data typically require long write cycles that erase entire blocks of data prior to new data being written. For example, UV light might be applied to an entire memory block in order to “repair” fused connections so that the block can be re-written with new data. RAM, on the other hand, can read or write to a randomly accessed byte of memory, typically performing either operation in a standard cycle.
Conventional nonvolatile RAM and ROM require three terminal MOSFET-based devices. The layout of such devices are not ideal, usually requiring feature sizes of at least 8f
2
for each memory cell, where f is the minimum feature size.
However, not all memory elements require three terminals. Certain complex metal oxides (CMOs), for example, can retain a resistive state after being exposed to an electronic pulse, which can be generated from two terminals. U.S. Pat. No. 6,204,139, issued Mar. 20, 2001, to Liu et al., incorporated herein by reference for all purposes, describes some perovskite materials that exhibit such characteristics. The perovskite materials are also described by the same researchers in “Electric-pulse-induced reversible resistance change effect in magnetoresistive films,” Applied Physics Letters, Vol. 76, No. 19, 8 May 2000, and “A New Concept for Non-Volatile Memory: The Electric-Pulse Induced Resistive Change Effect in Colossal Magnetoresistive Thin Films,” in materials for the 2001 Non-Volatile Memory Technology Symposium, all of which are hereby incorporated by reference for all purposes.
Similarly, the IBM Zurich Research Center has also published three technical papers that also discuss the use of metal oxide material for memory applications: “Reproducible switching effect in thin oxide films for memory applications,” Applied Physics Letters, Vol. 77, No. 1, 3 Jul. 2000, “Current-driven insulator-conductor transition and nonvolatile memory in chromium-doped SrTiO
3
single crystals,” Applied Physics Letters, Vol. 78, No. 23, 4 Jun. 2001, and “Electric current distribution across a metal-insulator-metal structure during bistable switching,” Journal of Applied Physics, Vol. 90, No. 6, 15 Sep. 2001, all of which are hereby incorporated by reference for all purposes.
Similarly, magnetic RAM (MRAM) requires only two terminals to deliver a magnetic field to the memory element. Other two terminal devices include Ovonic Unified Memory (OUM), which uses chalcogenic layers of material, and various types of ferroelectric memory. With only two terminals, it has been theorized that memory can be arranged in a cross point architecture.
However, mere recognition that a two terminal memory element is theoretically capable of being placed in a cross point array does not solve many of the non-trivial problems associated with actually creating such a device.
SUMMARY OF THE INVENTION
The present invention provides a driver set that fits within a specified line pitch. The driver set includes a semiconductor substrate, a plurality of line driver groups, and a plurality of conductive lines. Each line driver group is formed on the substrate and has N line drivers. Each conductive line are electrically connected to both a line driver and a plurality of memory cells, each memory cell being fabricated to a width W. The line driver group has a width that is not greater than N×W.
Another aspect of the invention is expressed with circuitry that includes a plurality of line driver groups, a primary decoder, a secondary decoder, and a memory array. The line driver groups are stacked in a first direction, each line driver group being in one of N positions and controlling one of N contiguous lines. The primary decoder is electrically connected to the plurality of line driver groups and is capable of selecting a single line driver group from the plurality of line driver groups. The secondary decoder is electrically connected to the line driver groups and is capable of selecting all the line drivers that are in a selected position from among the N positions. The size of the plurality of line driver groups in the first direction is less than or substantially the same as the size of the memory array in the first direction.
REFERENCES:
patent: 4442507 (1984-04-01), Roesner
patent: 5835396 (1998-11-01), Zhang
patent: 5920500 (1999-07-01), Tehrani et al.
patent: 6034882 (2000-03-01), Johnson et al.
patent: 6185122 (2001-02-01), Johnson et al.
patent: 6204139 (2001-03-01), Liu et al.
patent: 6351406 (2002-02-01), Johnson et al.
patent: 6385074 (2002-05-01), Johnson et al.
patent: 6483736 (2002-11-01), Johnson et al.
patent: 6504753 (2003-01-01), Scheuerlein et al.
patent: 6545891 (2003-04-01), Tringali et al.
patent: 6657885 (2003-12-01), Kuriyama et al.
patent: 2001/0023992 (2001-09-01), Doll
patent: 2002/0000597 (2002-01-01), Okazawa
patent: 2002/0067636 (2002-06-01), Kuriyama et al.
Beck, A. et al., “Reproducible switching effect in thin oxide films for memory applications”, Applied Physics Letters, vol. 77, No. 1, Jul. 3, 2000, 139-141.
Rossel, C. et al., “Electrical current distribution across a metal-insulator-metal structure during bistable switching”, Journal of Applied Physics, vol. 90, No. 6, Sep. 15, 2001, 2892-2898.
Watanabe, Y. et al., “Current-driven insulator-conductor transition and nonvolatile memory in chromium-doped SrTiO3single crystals”, Applied Physics Letters, vol. 78, No. 23, Jun. 4, 2001, 3738-3740.
Chevallier Christophe J.
Rinerson Darrell
Beyer Weaver & Thomas LLP
Tran Andrew Q.
Unity Semiconductor Corporation
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