Line coding mismatch detection technique

Details Line coding mismatch detection technique Line coding mismatch detection technique

1998-06-15

2001-05-15

Hsu, Alpus H. (Department: 2661)

Multiplex communications

Diagnostic testing

Of a switching system

C370S242000

Reexamination Certificate

active

06233225

ABSTRACT:

TECHNICAL FIELD
This invention relates to a technique for detecting a line coding mismatch between adjacent DS1-terminating equipment on a digital transmission facility.
BACKGROUND ART
Presently, most telecommunications service providers transmit traffic in a digital format on facilities such as T1 carrier systems. To accomplish digital transmission, digitizing equipment samples an incoming analog signal, typically at a rate of 8000 times per second. Each sample corresponds to eight bits (an octet) yielding a 64 Kbps channel, referred to as a “DS0” signal. T1 carrier systems multiplex twenty-four DS0 signals to yield a DS1 signal. The twenty-four DS0 signals, together with a framing bit, constitute a DS1 frame. Twelve DS1 frames comprise a Super Frame (SF). Twenty-four DS1 frames comprise an Extended Super Frame (ESF). The framing bit in each DS1 frame enables synchronization between the sending and receiving equipment.
The individual bits in each DS1 frame correspond to electrical pulses (or optical pulses in the case of optical media). Each “1” bit corresponds to a pulse having either positive or negative polarity. Each “0” bit corresponds to no pulse. Most T1 carrier systems use a signal transmission technique known as Alternate Mark Inversion (AMI) where consecutive “1” bits have alternate positive and negative polarity. The transition from positive to negative amplitude pulses or from either negative or positive to no pulse (zero bit) enables the equipment receiving the bits of a DS1 signal to synchronize itself with the sending equipment. A long string of “0” bits can lead to loss of synchronization.
To avoid loss of synchronization, techniques exist for forcing an occasional transition by substituting at least one “1” bit for at least one “0” bit in a long zero-bit string. Zero Code Substitution (ZCS) is a technique that ensures such pulse transitions for T1 carrier systems without clear channel capability. The Binary 8 Zero Substitution (B8ZS) technique is one used for T1 carrier systems that have clear channel capability. A sending facility employing the B8ZS technique substitutes (replaces) a string of eight consecutive “0” bits with an eight-bit string containing four “1” bits and two intentional bipolar violations that occupy the same interval as the replaced string of eight “0” bits. The receiving equipment detecting a bit string created in accordance with the B8ZS technique converts the string back to eight “0” bits.
In order for the B8ZS technique to work effectively, adjacent sending and receiving DS1-terminating equipment must utilize compatible coding techniques, otherwise coding errors can occur. These errors can manifest themselves in corrupting data or as crackling noise on some voice calls. With previously used analog and digital tests, errors were detectable but the root cause was difficult to ascertain. Thus, there is a need for a technique to definitively detect line coding errors.
BRIEF SUMMARY OF THE INVENTION
In accordance with a preferred embodiment of the invention, the technique disclosed herein is especially effective in detecting line coding mismatches. Such line coding mismatches are detected by repeatedly transmitting a test pattern that includes a first octet, typically hex code B5 (binary 10110101), a prescribed number of times. The first octet is followed by a second octet, typically hex code A3 (binary 10100011), which is also repeated a prescribed number of times. Following the second bit pattern is a third octet selected in accordance with the channel bit rate, which is repeated a prescribed number of times. For example, the third bit pattern consists of hex code 01 (binary 00000001) for a 56 Kbps channel and hex code 00 (binary 00000000) for a 64 Kbps channel. In case of a line coding mismatch, the above-described sequence of bit patterns yields a constant error signature having a predetermined number of errored seconds, severly errored seconds, unavailable time and lost sync. A distinct advantage of the method described is that remote test systems can generate the bit patterns and use test results to quickly and definitively detect line coding mismatches.


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