Line-addressable random-access memory decoupling apparatus

Details Line-addressable random-access memory decoupling apparatus Line-addressable random-access memory decoupling apparatus

1977-10-11

1979-02-13

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307243, 307364, 307DIG1, 307DIG3, 365208, 365220, G11C 700, H03K 518

Patent

active

041397878

ABSTRACT:
A decoupling apparatus for a charge-coupled device line-addressable random-access memory includes a series of bipolar transistors, the bases of which are connected to output lines from the CCD LARAM. The emitters of the bipolar transistors, connected together, are connected to the source of a depletion-mode MOS reset transistor and to a comparator circuit.

REFERENCES:
patent: 3597626 (1971-08-01), Heightley
patent: 3663887 (1972-05-01), Dix
patent: 3714465 (1973-01-01), Skrenes
patent: 3764826 (1973-10-01), Okada
patent: 3819953 (1974-06-01), Puckette et al.
patent: 3904977 (1975-09-01), Barsotti
patent: 3983413 (1976-09-01), Gunsagar et al.
patent: 4020364 (1977-04-01), Kuijk
patent: 4024512 (1977-05-01), Amelio et al.
patent: 4084256 (1978-04-01), Engeler et al.

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