Line address computer for providing line addresses in...

Television – Format – Specified color signal format

Reexamination Certificate

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C348S715000

Reexamination Certificate

active

10714833

ABSTRACT:
Presented herein is a system and method for a line address computer for providing line addresses in multiple contexts for interlaced to progressive conversion. A feeder fetches a first line from a top field, fetches a first line from a bottom field corresponding to the top field, after fetching the first line from the top field, and fetches a second line from the top field after fetching the first line from the bottom field. The second line from the top field is adjacent to the first line in the top field.

REFERENCES:
patent: 4698674 (1987-10-01), Bloom
patent: 4866520 (1989-09-01), Nomura et al.
patent: 5835150 (1998-11-01), Choi
patent: 6040868 (2000-03-01), Jun
patent: 6633344 (2003-10-01), Worrell et al.

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