Limiter circuit for timing recovery in a high speed digital repe

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307264, 307290, 328169, H03K 508

Patent

active

040705889

ABSTRACT:
A limiter circuit for the extracted timing signal in high speed digital repeaters is disclosed. The conventional emitter-coupled transistor pair limiter is modified by applying to the base of the output transistor the decoupled, attenuated, and delayed signal at the collector of the input transistor. The delay is such that the compensating signal at the base is out-of-phase with respect to the input signal by approximately -5/2.pi.. Experimental determination of delay and attenuation yields optimal phase and amplitude responses which are a significant improvement over those of the conventional limiter.

REFERENCES:
patent: 3054910 (1962-09-01), Bothwell
patent: 3529184 (1970-09-01), Conklin
patent: 3548215 (1970-12-01), Hoover
patent: 3584241 (1971-06-01), Nakamura
patent: 3622699 (1971-11-01), Richeson, Jr.

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