Limited variable width internal clock generation

Details Limited variable width internal clock generation Limited variable width internal clock generation

2005-06-07

2005-06-07

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S172000

Reexamination Certificate

active

06903592

ABSTRACT:
A circuit and method of generating an internal chip clock signal for distribution throughout an integrated circuit in response to an external clock signal includes the steps of generating a minimum width internal clock signal if the width of the external clock signal is less than a predetermined minimum width, generating an internal clock signal having a width substantially equal to the width of the external clock signal if the width of the external clock signal is greater than a predetermined minimum width but less than a predetermined maximum width, and generating a maximum width internal clock signal if the width of the external clock signal is greater than a predetermined maximum width.

REFERENCES:
patent: 5161161 (1992-11-01), Malek-Khosravi et al.
patent: 5214431 (1993-05-01), Oikawa
patent: 5281874 (1994-01-01), Sorrells et al.
patent: 6043697 (2000-03-01), Jang
patent: 6222408 (2001-04-01), Saeki
patent: 6339555 (2002-01-01), Hamada et al.
patent: 6370210 (2002-04-01), Yamamoto
patent: 6677791 (2004-01-01), Okuda et al.

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