Limited probes device testing for high pin count digital devices

Details Limited probes device testing for high pin count digital devices Limited probes device testing for high pin count digital devices

1996-08-05

1997-06-17

Canney, Vincent P.

Excavating

39518306, G01R 3128

Patent

active

056404042

ABSTRACT:
An integrated circuit is tested when input/output pads of the integrated circuit are unconnected to any external device. In order to do this, for each of a subset of the unconnected input/output pads, a boundary scan register is provided. A test vector is scanned serially into the boundary scan registers. The test vector may then be applied to internal logic of the integrated circuit. While the test is in progress, the value contained within each boundary scan register is applied to an associated input/output pad so that, as a result, the test vector is applied to the subset of the unconnected input/output pads.

REFERENCES:
patent: 5396170 (1995-03-01), D'Souza et al.
patent: 5428624 (1995-06-01), Blair et al.
patent: 5477545 (1995-12-01), Huang
patent: 5592493 (1997-01-01), Crouch et al.

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