Lightly doped drain MOS transistor

Details Lightly doped drain MOS transistor Lightly doped drain MOS transistor

2007-06-05

2007-06-05

Nhu, David (Department: 2818)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S197000, C438S381000, C438S680000, C257SE21058, C257SE21231, C257SE21170, C257SE21249, C257SE21632, C257SE21646

Reexamination Certificate

active

11013210

ABSTRACT:
A method of forming a MOS transistor in an upper surface of a semiconductor substrate. A gate oxide layer covers the upper surface of the substrate. A gate stack including one or more thin film layers covers the gate oxide layer. A gate electrode pattern is partially etched into the gate stack, the partial etching step being completed before any of the gate oxide layer is exposed. Sidewall spacers are formed on edge surfaces of the partially formed gate electrode. Source and drain regions are created by ion implantation using the partially etched gate electrode and the sidewall spacers as a mask. The sidewall spacers are removed and lightly doped drain regions are formed by ion implantation using the partially etched gate electrode as a mask.

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