Light receiving semiconductor device with PIN structure

Details Light receiving semiconductor device with PIN structure Light receiving semiconductor device with PIN structure

2002-07-03

2003-07-15

Wilson, Allan R. (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Electromagnetic or particle radiation

C257S459000, C257S466000

Reexamination Certificate

active

06593635

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a light receiving semiconductor device with a PIN configuration used in an optical data transmission.
2. Related Prior Arts
A PIN-PD (PIN-Photo Diode) is used in an optical fiber communication as a light detecting device. In particular, the PIN-PD with a mesa structure is widely used in an opto-electronic integrated circuit (OEIC) as the light receiving optical device. In the OEIC, an optical element and electronic elements are integrated on the same semiconductor substrate, which provides high performance and cost-effective devices realizing the higher transmission rate and the larger capacity of the communication system. The PIN-PD with the mesa structure is superior to a planar structure type PD in various viewpoints. For example, it is easily integrated with other element or devices because it shows better isolation performance from another circuit elements on the same substrate. It is able to size up the wafer diameter because the impurity doping to the semiconductor layers are performed by an epitaxial growth, which shows the good uniformity of the doping. It shows the superior high frequency performance because a material surrounding the mesa structure is removed and small extrinsic stray capacitance is influenced.
On the other hand, since an interface between the p-type layer and i-type layer and a interface between the i-type layer and an n-type layer are exposed to the ambience, such PIN-PD shows a large dark current leaked through side surfaces of the mesa structure. To reduce the dark current, it is ordinarily measured to cover side surfaces of the mesa with an insulating film or some semiconductor films having greater band gap energy than that of the PIN structure. Proceedings of the 1999 Engineering Science Society Conference of IEICE (The Institute of Electronics, Information and Communication Engineers) SC-2-3, pp. 435-436 reported effects of the InP covering layer as a passivation film on the dark current.
FIG. 11
shows a conventional mesa-type PIN-PD with the InP passivation layer. The PD has an InP substrate
20
, n-type semiconductor layer
30
, i-type semiconductor layer
31
, and a p-type semiconductor layer
32
sequentially grown on the substrate
20
. The i-type layer
31
and the p-type layer
32
are made of the same material, such as InGaAs, the lattice constant of which matches to InP. The surface of the i-type layer
31
and the p-type layer
32
, they are formed into the mesa structure, are covered with an un-doped InP layer
40
, the band gap energy of the InP is greater than InGaAs of the i-type layer and the p-type layer. Since the numbers of defects induced in the interface between the semiconductor materials is by far less than those induced between the semiconductor material and the non-semiconductor material, the dark current due to such defects can be eliminated. The proceedings above cited also reported that the high frequency performance of the mesa-type PIN-PD having the InP passivation layer realized the responsive at 2 GHz under the presetting bias condition.
However, the current and the future optical communication system require higher frequency performance, 10 GHz or more, to the PIN-PD. The PIN-PD shown in
FIG. 11
would be hard to suit for such high performance system. The high frequency response of the PIN-PD having the InP passivation layer depends on the intrinsic resistance R and the capacitance C of the device itself. In the device shown in
FIG. 11
, since Zinc (Zn) atoms as the p-type dopant in the p-type layer
32
diffuse into the i-type layer
31
, which results on the increasing of the depletion capacitance, thus limits the high frequency performance. To reduce the intrinsic capacitance of the PIN-PD, the diameter of the mesa structure must be small. However, this brings the deterioration of the sensitivity.
FIG. 9
shows the relation of the intrinsic capacitance and the sensitivity to the thickness of the p-type layer
32
for the conventional PD shown in FIG.
11
. In
FIG. 9
, circles denote the sensitivity, while the rectangles correspond to the capacitance. Similarly,
FIG. 10
shows the relation of the dark current of the PD to the thickness of the p-type layer
32
. Here, the diameter of the light receiving area is 100 um, and the measurement in
FIG. 9
is performed under −3V reverse biased condition.
As shown in
FIG. 9
, the sensitivity and the capacitance improve as the thickness decreases. By setting the thickness of p-type GaInAs layer
32
in
FIG. 11
from 250 nm to 50 nm, the capacitance decreases to ⅔. This is because of the reduction of the diffusion of Zn atoms into the i-type layer. Although the capacitance decreases and the sensitivity increases by thinning of the p-type layer
32
, the dark current increases as shown in FIG.
10
.
The object of the present invention is to provide the semiconductor optical device in which the sensitivity consists with the high frequency performance without increasing the dark current.
SUMMARY OF THE INVENTION
To solve the problem, a PIN-PD of the present invention comprises a semiconductor substrate, a first semiconductor layer of a first conducting type, a second semiconductor layer made of unintentionally doped semiconductor, and a third layer of a second conducting type different with the first conducting type. The second layer and the third layer are made of the first semiconductor material and form a first mesa structure. The third layer has a first region and a second region surrounding the first region therein, a thickness of the first region is thinner than that of the second region. Further, the PIN-PD of the present invention has a fourth layer made of a second semiconductor material, the fourth layer covering the first layer, the second layer and the third layer therewith, the band gap energy of the fourth layer is greater than that of the first semiconductor material.
According to the configuration of the present invention, the sensitivity is enhanced because of the decreasing of the light absorption within the third layer, and the intrinsic capacitance is reduced because impurities doped in the third layer are prevented diffuse into the second layer. Therefore, the operation frequency over 40 GHz will be attained.
The semiconductor substrate and the second semiconductor material are preferred to be InP, while the first material is preferred to be InGaAs, the lattice constant of which matches to the InP.
Further aspect of the present invention, the first conducting type is n-type and the second conducting type is p-type, while the second layer and the fourth layer is unintentionally doped, thus forms a PIN-PD. The invention of the present invention has a structure that the third layer consists of the first region and the second region surrounding the first region therein. The electrode contacting to the third layer is formed in the first region. By this configuration, the light receiving area of the third layer is able to expand, thus enhancing the sensitivity.
Another aspect of the present invention is that the electrode contacting to the third layer is formed in the second region of the third layer. With this configuration, further reducing of the dark current and the intrinsic capacitance is possible.
The thickness of the second region of the third layer is preferred to be greater than 0.2 um and not greater than 0.5 um. The leak current flowing along the side surface of the third layer and that of the second layer increases when the thickness is below 0.2 um, while the intrinsic capacitance increases when the thickness is over 0.5 um.
On the other hand, the thickness of the first region of the third layer is preferred to be greater than 0.02 um and not greater than 0.25 um. In the case that the thickness below 0.02 um, the intrinsic resistance of the device increases, while the capacitance increases when the thickness is over 0.25 um.
Further scope of applicability of the present invention will become apparent form the detailed description given h

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