Light-induced voltage alteration for integrated circuit analysis

Radiant energy – Photocells; circuits and apparatus – With circuit for evaluating a web – strand – strip – or sheet

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

G01N 2188

Patent

active

054303052

ABSTRACT:
An apparatus and method are described for analyzing an integrated circuit (IC), The invention uses a focused light beam that is scanned over a surface of the IC to generate a light-induced voltage alteration (LIVA) signal for analysis of the IC, The LIVA signal may be used to generate an image of the IC showing the location of any defects in the IC; and it may be further used to image and control the logic states of the IC. The invention has uses for IC failure analysis, for the development of ICs, for production-line inspection of ICs, and for qualification of ICs.

REFERENCES:
patent: 4698587 (1987-10-01), Burns et al.
E. I. Cole, Jr. et al., "Novel Failure Analysis Techniques Using Photon Probing With a Scanning Optical Microscope" Conference Paper presented at the 1994 International Reliability Physics Symposium, San Jose, Calif. Apr. 11-14, 1994.
J. M. Soden and Richard E. Anderson "IC Failure Analysis: Techniques and Tools for Quality and Reliability Improvement," Proc. IEEE, vol. 81, pp. 703-715, May 1993.
E. I. Cole, Jr. et al. "Advanced Scanning Electron Microscopy Methods and Applications to Integrated Circuit Failure of Analysis," Scanning Microscopy, vol. 2, No. 1, pp. 133-150, 1988.
K. S. Wills et al., "Optical Beam Induced Current Applications for Failure Analysis of VLSI Devices," in Proceedings of the International Symposium on Testing and Failure Analysis [ASM, 1990], pp. 21-26.
E. Zanoni, et al., "Detection and Localization of Gate Oxide Shorts in MOS Transistors by Optical-Beam-Induced Current," IEEE Trans. Electron. Dev., vol. 38, No. 2, pp. 417-419, Feb. 1991.
E. I. Cole, Jr. and R. E. Anderson, "Rapid Localization of IC Open Conductors Using Charge-Induced Voltage Alteration," Presented at the 1992 Int'l Reliability Physics Symposium, San Diego, Calif., Mar. 30-Apr. 2, 1992.
Edward I. Cole, Jr. "A New Technique for Imaging the Logic State of Passivated Conductors: Biased Resistive Contrast Imaging," in Proceedings of the International Reliability Physics Symposium, New Orleans, La. Mar. 27-29, 1990, pp. 45-50.
S. Gorlich and E. Kubalek, "Electron Beam Induced Damage on Passivated Metal Oxide Semiconductor Devices," Scanning Electron Microscopy, vol. 1, pp. 87-95, 1985.
D. J. Burns and J. M. Kendall, "Imaging Latch-Up Sites in LSI CMOS with a Laser Photoscanner," in Proceedings of the International Reliability Physics Symposium [IEEE, 1983], pp. 118-121.
F. J. Henley, "Logic Failure Analysis of CMOS VLSI Using a Laser Probe," in Proceedings of the International Reliability Physics Symposium [IEEE, 1984], pp. 69-75.
D. E. Sawyer and D. W. Berning, "Laser Scanning of MOS IC's Reveals Internal Logic States Nondestructively," Proceedings of the IEEE, vol. 64, pp. 393-394, Nov. 1976.
J. R. Haberer and J. J. Bart, "Charge Induced Instability in 709 Operational Amplifiers," in Proceedings of the International Reliability Physics Symposium [IEEE, 1972], pp. 106-111.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Light-induced voltage alteration for integrated circuit analysis does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Light-induced voltage alteration for integrated circuit analysis, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Light-induced voltage alteration for integrated circuit analysis will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-762183

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.