Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2002-12-02
2004-08-31
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S022000, C438S046000, C438S026000, C438S119000, C438S121000
Reexamination Certificate
active
06784027
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a light-emitting semiconductor component having a semiconductor element with an active layered structure, electrical contacts for impressing a current into the active layered structure, a carrier acting as a heat sink for the semiconductor element, and a conductive adhesive electrically and thermally connecting the semiconductor element to the carrier.
During operation of such a semiconductor component, waste heat is generated in the semiconductor element, in particular in its active layer, which is for example, a pn-type junction, and at the electrical contacts for impressing a current into the active layer. In order to conduct this heat away to the carrier that functions as a heat sink and that has the largest possible thermal capacity, one of the side faces of the semiconductor element is generally connected to the carrier.
In this context there is the problem that, when electrically conductive adhesives that are conventionally available for this purpose are used to conductively mount the semiconductor element on the carrier, the layer of conductive adhesive, which typically has a thickness of 5 &mgr;m to 10 &mgr;m, significantly increases the overall thermal resistance R
th
between the active region of the LED chip and the carrier that serves as a heat sink. This leads to a reduction of the flow of heat into the heat sink and causes the occurrence of relatively high temperatures, which ultimately restrict the achievable optical power, in the active region of the component.
Hitherto, this increased thermal resistance has been accepted in most applications. In critical applications, other mounting techniques have been used, for example, the chips are soldered onto the carrier. However, this is associated with an increased degree of expenditure for mounting.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a light-emitting semiconductor component of the type mentioned at the beginning, in which the thermal connection of the semiconductor element to the heat-absorbing carrier is improved as compared to the prior art semiconductor components of this type.
With the foregoing and other objects in view there is provided, in accordance with the invention, a light-emitting semiconductor component, including: a semiconductor element including an active layered structure; electrical contacts for impressing a current into the active layered structure; a carrier for the semiconductor element, the carrier acting as a heat sink; and a conductive adhesive electrically and thermally connecting the carrier to the semiconductor element. The semiconductor element has a side facing the carrier. This side, which is a rear side, is formed with a plurality of recesses for accommodating a portion of the conductive adhesive between the semiconductor element and the carrier.
According to the invention, in a light-emitting semiconductor component of the type mentioned at the beginning, recesses, which accommodate a part of the conductive adhesive when the semiconductor element is connected to the carrier, are provided in the side of the semiconductor element facing the carrier.
The conductive adhesives that are conventionally available for connecting the semiconductor element and the carrier generally have a much smaller thermal conductivity than the semiconductor material of the semiconductor element itself. In the invention, in order to reduce the problems associated with conducting heat away, the mounting side of the semiconductor element is patterned in such a way that during the connection (chip bonding), the adhesive can largely flow into the recesses that are provided. As a result, even when there is the same overall volume of adhesive, the layer of adhesive remaining between the recesses is dilated to such an extent that in these regions the layer of adhesive only has a small thermal resistance between the semiconductor element and the carrier and only makes a small contribution to the overall thermal resistance between the active layer and the carrier.
The thermal resistance of the adhesive that has flowed into the recess is itself largely bridged by the semiconductor material having a higher thermal conductivity which now extends in regions almost as far as the carrier. This results overall in a significantly reduced overall thermal resistance.
The recesses are preferably formed as elongated trenches with, for example, a square, rectangular, triangular, or trapezoidal cross section. This permits the rear side of the semiconductor element to be structured easily, for example, by sawing, milling, or etching.
The recesses can preferably also be produced in the form of square, pyramid-shaped, or conical pits. This also permits easy structuring of the rear side of the semiconductor element.
In conventional semiconductor elements that are mounted on the carrier by their substrate on which the active layer is located, it has proven expedient if the recesses have a depth of 2 &mgr;m to 80 &mgr;m, preferably of 5 &mgr;m to 40 &mgr;m, particularly preferably of approximately 10 &mgr;m to approximately 20 &mgr;m.
Likewise, the recesses can advantageously have a depth of 1% to 40%, preferably of 2% to 20%, particularly preferably of approximately 5% to approximately 10%, of the thickness of the semiconductor element. Here, the depth of the recesses is measured from the rear-side surface of the semiconductor element from which the recesses extend into the semiconductor element.
Advantageously 10% to 90%, preferably 25% to 75%, particularly preferably approximately 40% to approximately 60%, of the rear side of the semiconductor element is occupied.
Here, the degree of occupancy is the ratio between the area of the rear side of the semiconductor element that remains between the recesses to the overall area of the lower surface of the semiconductor element including the recesses. If, for example, recesses with an overall area of 40,000 &mgr;m
2
(for example 16 square recesses with a surface area of 50×50 &mgr;m
2
) are introduced into an LED chip with an area of 300×300 &mgr;m
2
=90,000 &mgr;m
2
, a degree of occupancy of {fraction (5/9)}=55.5% results from the remaining unpatterned area of, 50,000 &mgr;m
2
.
The entire output surface of the recesses and the depth of the recesses are inversely proportional to one another. If, for example, a greater depth of the recesses is selected, a smaller output surface is enough to absorb a sufficient quantity of conductive adhesive in the volume of the recesses. Conversely, when the depth of the recesses is smaller, a larger output surface is generally necessary in order to achieve a significant reduction in the thermal resistance.
Basically, the depth and degree of occupancy of the recesses are proportional to the typical layer thickness of the conductive adhesive that is determined when a semiconductor element with the same area, but without recesses is applied. If a layer thickness of 5 &mgr;m, for example, is obtained with a specific adhesive, it is possible, for example with a degree of occupancy of 50%, to accommodate essentially the entire volume of adhesive of 10 &mgr;m-deep recesses. All that then remains is a thin continuous adhesive layer between the rear side of the semiconductor element and the carrier.
With this degree of occupancy, deeper recesses do not provide any further advantage as no additional adhesive can be accommodated, but the thermal resistance rises again because of the larger structured volume.
Flatter recesses do not accommodate the entire volume of adhesive, and in doing so leave a thicker continuous adhesive layer between the rear side of the semiconductor element and the carrier, thus resulting in a higher overall thermal resistance.
The same considerations apply if a different degree of occupancy is selected.
In one preferred refinement, the recesses on the rear side of the semiconductor element each have the same shape and output surface.
In particular, the recesses may be arranged on the rear side
Streubel Klaus
Wirth Ralph
Greenberg Laurence A.
Mayback Gregory L.
Osram Opto Semiconductors GmbH
Pham Long
Stemer Werner H.
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