Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2008-03-07
2009-06-16
Thai, Luan C (Department: 2891)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S124000, C438S121000, C438S116000, C438S064000, C257S676000, C257S706000, C257S433000, C257S434000
Reexamination Certificate
active
07547583
ABSTRACT:
A packaged circuit and method for packaging an integrated circuit are disclosed. The packaged circuit has a lead frame, an integrated circuit chip, and an encapsulating layer. The lead frame has first and second sections, the first section including a lateral portion, a chip mounting area and a first extension. The integrated circuit chip is mounted in the chip mounting area and is in thermal contact with the chip mounting area. The encapsulating layer has top, bottom, and first and second side surfaces. The first extension is bent to provide a first heat path from the chip mounting area to the bottom surface. The heat path connects the heat chip mounting area to the bottom surface without passing through the first and second side surfaces and provides a heat path that has less thermal resistance than the heat path through either the lateral portion or the second section.
REFERENCES:
patent: 2002/0163001 (2002-11-01), Shaddock
patent: 2006/0226435 (2006-10-01), Mok et al.
Koay Hui Peng
Lee Chiau Jin
Loo Wei Liam
Ng Keat Chuan
Ng Kee Yean
Avago Technologies General IP ( Singapore) Pte. Ltd.
Thai Luan C
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