Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Dopant introduction into semiconductor region
Reexamination Certificate
1999-06-10
2001-08-07
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Dopant introduction into semiconductor region
C438S047000
Reexamination Certificate
active
06271051
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a light-emitting diode, a light-emitting diode array, and a method of their fabrication.
A conventional light-emitting diode is disclosed in the publication, “Design of an Optical Printer,” Triceps WS 6, 1985, pp. 121-126. The structure of the conventional LED and the method of its fabrication will first be described with reference to FIG.
7
.
The illustrated conventional LED
50
is formed of an n-type GaAs substrate
51
, and an n-type GaAsP layer
52
formed on the GaAs substrate, and a diffusion mask
54
having an aperture formed on the GaAsP layer
52
. The LED
50
is provided with a p-type diffusion region
56
on the surface of the n-type GaAsP layer
52
.
A p-side electrode
58
is provided to extend on the surface of the diffusion mask
54
and the p-type diffusion region
56
. An n-type electrode
60
is provided on the lower surface of the substrate
51
.
A vapor-phase diffusion is generally used to form the diffusion layer
56
in the n-type GaAsP layer
52
.
With the conventional LED
50
, the GaAs substrate
51
is used as the substrate
51
, and a relatively thick n-type GaAsP layer
52
is formed on the substrate
51
. For this reason, the diffusion region
56
can be formed by vapor-phase diffusion, deeply in the n-type GaAsP layer
52
.
The conventional LED has the following problems with regard to the substrate.
Because a GaAs substrate is used as the substrate
51
, it is easily broken during dicing, and is easily chipped off during dicing, so dicing has to be conducted slowly.
Moreover, the dimension of the wafer is at the utmost 3 inches (about 7.62 cm) at present, and a wafer having a diameter larger than 3 inches (e.g., of 8 inches (about 20.32 cm)) is not available. In addition, the cost of the substrate is higher than a silicon substrate or the like.
To solve the problems described above, an attempt has been made to form a compound semiconductor layer on a silicon (Si) substrate. However, this brings about the following problems.
If a compound semiconductor layer is formed to a large thickness on a silicon substrate, a crack may be produced in the compound semiconductor layer because of the difference in the thermal expansion coefficient between the materials of the substrate and the compound semiconductor layer, and no useful device is obtained. The present inventors have confirmed that cracks are generally produced in the compound semiconductor layer if the thickness of the compound semiconductor layer 3.5 &mgr;m or more. For this reason, there has been a restriction that the compound semiconductor layer on the Si substrate cannot be made thick.
If the compound semiconductor layer on the substrate is made thin, and if a diffusion layer is formed by vapor-phase diffusion, the depth of the diffusion region may exceed the thickness of the compound semiconductor layer, and no pn junction can be formed. For these reasons, it was very difficult to form an LED or LED array using a Si substrate having a large diameter.
SUMMARY OF THE INVENTION
In view of the above, an object of the invention is to provide an LED and an LED array which are associated with no cracking and chipping-off even if a compound semiconductor layer is formed on a large-diameter wafer, and which has a superior light emitting intensity characteristics.
Another object of the invention is to provide a method of fabrication of such an LED or an LED array.
According to a first aspect of the invention, there is provided a light-emitting diode having a compound semiconductor layer of a first conductivity type on a substrate at least a surface portion of which is formed of silicon, and an impurity diffusion region of a second conductivity type provided in the compound semiconductor layer as a light emitting layer, wherein the diffusion layer is a solid-phase diffusion layer.
With the above arrangement, the diffusion region of the second conductivity type formed by the solid-phase diffusion in the compound semiconductor layer is provided, so that the depth of the diffusion region can be reduced. Moreover, the impurity concentration in the diffusion region can be made higher, compared with the conventional vapor-phase diffusion. Accordingly, even if the depth of the diffusion layer of an LED is reduced, the emitted light power suitable for printing in a printer can be obtained.
It is preferable that the diffusion region is formed from the surface of the compound semiconductor layer to a depth of 20 to 60% of the depth of the compound semiconductor layer.
If the depth of the diffusion region is from the surface of the compound semiconductor layer to the depth of 20 to 60% of the thickness of the layer, the emitted light power can be maintained at a level suitable for printing in a printer. That is, even if the depth is restricted to such a value, it is possible to restrain an increase of the sheet resistance, and to restrain the reduction of the emitted light power, and it is possible to prevent the depth from approaching the thickness of the compound semiconductor layer, thereby avoiding a situation in which motion of the carriers at the pn junction or re-combination of the carrier due to light emission are disabled, and in which light emission of the LED is stopped.
It is preferable that the lower limit of the diffusion impurity concentration in the diffusion region is 5×10
19
atoms/cm
3
.
If the diffusion impurity concentration in the diffusion region is 5×10
19
atoms/cm
3
, it is possible to achieve a high emitted light power even if the diffusion region is shallow.
It is preferable that an additional compound semiconductor layer is provided as a buffer layer between the substrate and the first-mentioned compound semiconductor layer in which the diffusion region is formed.
The buffer layer alleviates the stress generated by the difference in the thermal expansion coefficient and lattice-constant mismatch between the silicon substrate and the first-mentioned compound semiconductor layer, and generation of cracks in the first-mentioned compound semiconductor layer and the defect concentration can be reduced.
The invention also provides a light-emitting diode array having a compound semiconductor layer of a first conductivity type on a substrate at least a surface portion of which is formed of silicon, and impurity diffusion regions of a second conductivity type provided in the compound semiconductor layer as a light emitting layer, said diffusion regions being aligned to form an array, wherein said diffusion layers are solid-phase diffusion layers.
According to another aspect of the invention, there is provided a method of fabricating a light-emitting diode comprising the steps of:
forming a compound semiconductor layer of a first conductivity type on a substrate at least a surface portion of which is formed of silicon; and
forming a diffusion region of a second conductivity type in the compound semiconductor layer as a light emitting layer; and
wherein the diffusion region is formed by solid-phase diffusion.
With the above arrangement, the diffusion region of the second conductivity type is formed in the first compound semiconductor layer, by a solid-phase diffusion method, so that the depth of the diffusion region from the surface of the compound semiconductor layer is small, and it is possible to form an impurity diffusion region of a higher concentration, compared with the conventional vapor-phase diffusion. Accordingly, an emitted light power of an LED suitable for printing in a printer can be obtained.
It is preferable that the method further comprises, prior to the step of forming the diffusion region,
(a) the step of forming a diffusion mask having an aperture on the first compound semiconductor layer; and
(b) the step of thereafter annealing for removing crystal defects in that part of said compound semiconductor layer which is exposed by said aperture of said diffusion mask.
Thus, in a step prior to the formation of the diffusion region, annealing is applied to the structure including the diffusion mask, so
Hamano Hiroshi
Nakamura Yukio
Ogihara Mitsuhiko
Taninaka Masumi
Fourson George
Oki Data Corporation
Pham Thanh V
Venable
Voorhees Catherine M.
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