Light controlled silicon on insulator device

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation

Reexamination Certificate

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C257S079000, C257S080000, C257S083000, C257S084000, C257S460000, C257S463000, C257S347000, C438S022000, C438S024000, C438S031000, C438S048000, C438S065000

Reexamination Certificate

active

06545333

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of silicon on insulator devices; more specifically, it relates to light controlled silicon on insulator field effect transistors and methods of fabricating said transistors.
2. Background of the Invention
Silicon-on-insulator (SOI) technology is used to fabricate field effect transistors (FETs) with high switching speeds and low power consumption. However, since there is normally no electrical ground on n-type field effect transistor (NFET) bodies nor N-well bias on p-type field effect transistor (PFET) bodies on an SOI wafer, unlike the case of bulk-silicon complimentary metal-oxide-silicon (CMOS), the FET bodies of such devices float to voltages that are a function of the history of the use of circuits containing the FETs. This leaves the possibility of further improvements to trade-offs in standby power and performance. Standby power is adversely affected in that under conditions of high drain voltage the body of a FET is drawn toward the drain voltage, lowering the threshold voltage and, in turn, raising sub-threshold leakage currents. Performance is adversely affected in that under certain circumstances, such as low drain-to-source voltage, the threshold voltage will be high by virtue of near-zero body-to-source bias, leading to low drive. One technique to overcome these problems involves making provision for electrical connection of all of the n-type FET bodies to a first common electrical node and all of the p-type FET bodies to a second common electrical node. When low standby power is required, both common nodes are biased so as to raise the threshold voltages of the FETs (typically negative bias for the n-type FET bodies and positive bias for the p-type FET bodies). When high performance is required, the common nodes are biased so as to lower the threshold voltages of the FETs. Other methods such as, the Multiple-Threshold CMOS (MTCMOS), may involve the use of a virtual power supply and/or ground rail in which MOSFETs with high threshold voltages are used to supply power to virtual power rails, and low-threshold MOSFETs comprise high-speed circuits which are powered by the virtual power rails. Thus the logic circuits can switch rapidly when powered, but can not be effectively cut-off from any standby power drain by switching off the high-threshold FETs that supply power to the virtual rails. These techniques can be applied only to situations where activity of the high-speed circuits can be accurately predicted. Management of the trade-off between high-speed circuits and low standby power requires knowledge of timing and use requirements of the circuits. Furthermore, both techniques require the addition of extensive wiring due to either having to wire the FET bodies, or due to the need for the switched-rail power supply wires as well as signal wires to the high-threshold-voltage FETs which switch these rails.
BRIEF SUMMARY OF THE INVENTION
A first aspect of the present invention is a system comprising a semiconductor die including a substrate having upper and lower surfaces, the semiconductor die including an FET, the FET having a gate on the upper surface, a body under the gate and a source contacting the body forming a body-to-source junction; and a light source, the light source for exposing the body to light from the lower surface.
A second aspect of the present invention is an electronic device adapted for control by exposure to light of a pre-determined wavelength, comprising: a substrate having upper and lower surfaces; an insulating layer having upper and lower surfaces on the upper surface of the substrate; a plurality of FETs formed on the top surface of the insulating layer, each FET having a gate, a body under the gate and a source contacting the body forming a body-to-source junction; trenches in the substrate, the trenches aligned to the body of at least a portion of the FETs, extending from the lower surface of the substrate to the lower surface of the insulating layer and filled with a light transmitting material; and; an optical guide layer on the lower surface of the substrate and on the filled trenches.
A third aspect of the present invention is an electronic device adapted for control by exposure to light of a pre-determined wavelength, comprising: a thermally conductive substrate having upper and lower surfaces; an insulating layer having upper and lower surfaces on the upper surface of the substrate; a plurality of FETs formed on the top surface of the insulating layer, each FET having a gate, a body under the gate and a source contacting the body forming a body-to-source junction; and trenches in the substrate, the trenches aligned to the body of at least a portion of the FETs, extending from the lower surface of the substrate to the lower surface of the insulating layer and filled with a light transmitting material to form optical guides.
A fourth aspect of the present invention is a method of fabricating an electronic device adapted for control by exposure to light of a pre-determined wavelength, comprising: providing a semiconductor die, comprising: a substrate having upper and lower surfaces; an insulating layer having upper and lower surfaces on the upper surface of the substrate; and a plurality of FETs formed on the top surface of the insulating layer, each FET having a gate, a body under the gate and a source contacting the body forming a body-to-source junction; thinning the substrate; forming trenches in the substrate, the trenches aligned to the body of at least a portion of the FETs and extending from the lower surface of the substrate to the lower surface of the insulating layer; filling the trenches with a light transmitting material; and forming an optical guide layer on top of the substrate and the filled trenches.
A fifth aspect of the present invention is a method of fabricating an electronic device adapted for control by exposure to light of a pre-determined wavelength, comprising: providing a semiconductor die, comprising: a substrate having upper and lower surfaces; an insulating layer having upper and lower surfaces on the upper surface of the substrate; and a plurality of FETs formed on the top surface of the insulating layer, each FET having a gate, a body under the gate and a source contacting the body forming a body-to-source junction; thinning the substrate; forming trenches in the substrate, the trenches aligned to the body of at least a portion of the FETs and extending from the lower surface of the substrate to the lower surface of the insulating layer; filling the trenches with a light transmitting material to form optical guides; removing the substrate to expose portions of the insulating layer; and forming a conductive layer on the exposed portions of the insulating layer.
A sixth aspect of the present invention is an electronic device adapted for control by exposure to light of a pre-determined wavelength, comprising: a semiconductor die comprising: a thermally conductive substrate having upper and lower surfaces; an insulating layer having upper and lower surfaces on the upper surface of the substrate; a plurality of FETs formed on the top surface of the insulating layer, each FET having a gate, a body under the gate and a source contacting the body forming a body-to-source junction; and optical paths formed in the substrate, the optical paths disposed to provide light to the body of at least a portion of the FETs, and extending from the lower surface of the substrate to the lower surface of the insulating layer.


REFERENCES:
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patent: 6429487 (2002-08-01), Kunikiyo
patent: 6433362 (2002-08-01), Pollard
patent: 63-038269 (1998-02-01), None

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