Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2000-07-27
2003-10-07
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S738000
Reexamination Certificate
active
06630736
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention pertains to semiconductor integrated circuits, and more particularly to light sensitive integrated circuits and to surface mount structures that exclude ambient light.
The manufacturing process for making integrated circuit chips is performed, not on individual integrated circuit chips, but rather on semiconductor wafers. At the present state of the art many thousands of integrated circuits may be formed on a silicon wafer whose diameter is between about 6 inches to about 12 inches. Each chip is a structure that includes one or more layers of insulator, conductor and semiconductor, each layer being patterned according to a mask, which defines the circuitry on the chip. Bonding pads are also formed on the surface of the wafer, and thus each of the chips, to provide contacts for input signals, output signals, supply voltage, and ground. In the manufacture of certain types of chips, for example some surface mount device packages, an elevated bump is formed on the bonding pads. Typically, these raised bumps are solder bumps that are used to connect the chip to a substrate such as a printed circuit board. After the wafer is fabricated, each of the integrated circuit chips is separated from the wafer in a dicing or singulation procedure to form separate integrated circuit chips. After separation, each integrated circuit chip is individually packaged and attached to an associated substrate by bringing the solder bumps into contact with metal traces on the substrate and then, in one operation, reflowing the solder bumps so as to permanently attach solder bumps to traces.
Conventionally, after the solder bumps are electrically coupled to the contacts of the substrate, an underfill layer is injected between the substrate and the surface mount device and around the solder bump of the surface mount device. The underfill material is selected for its mechanical properties so that it redistributes the mechanical and thermomechanical stresses arising between the device and the substrate. That is, the underfill protects the device from mechanical damage. Unfortunately, however, the formation of this underfill layer results in an extra process step and an expenditure of man-hours and associated costs for the conventional surface mount device. As such, another approach for protecting the device has been to apply a resilient protective layer to the semiconductor wafer before the solder bumps are formed. After the surface mount device has been attached to a substrate, the resilient protective layer protects the solder bumps and active regions of the device from mechanical damage arising from mechanical and thermomechanical stresses arising between the device and the substrate. The resilient layer provides protection against mechanical damage while avoiding the use of underfill. By eliminating the underfill, significant costs associated with the injection of underfill may be avoided. Furthermore, when a resilient protective layer is used, the device may not be fully encapsulated, as compared with many conventional surface mount packages. As a result, the overall size and costs of the device may be reduced.
Although the resilient protective layer works well, there are continuing efforts to improve devices that use them. For example, because the resilient coating is generally transparent and no underfill is used, the circuit side of the surface mount device is exposed to whatever ambient light enters the space between the device and the substrate. Furthermore, because the surface mount device is not fully encapsulated, the sides of the surface mount device are also exposed to ambient light. Ambient light includes natural daylight and lamplight. As a result, the transparent resilient coating and the exposed sides of the device can cause a path for ambient light to enter the active regions of the circuit. Some circuits can operate satisfactorily in ambient light. However, some other circuits are so sensitive to ambient light that their electrical characteristics are altered to an unacceptable degree. More particularly, the introduction of light can result in unwanted leakages in regions that would influence the performance of the device. As such, these light sensitive circuits must be isolated from ambient light. Thus a need exists for protecting surface mount devices, which are not fully encapsulated or which are protected by a transparent material, from ambient light.
SUMMARY OF THE INVENTION
To achieve the foregoing and other objects of the invention, methods and devices for minimizing the effect of ambient light introduced to integrated circuits are described. The invention pertains to an integrated circuit package, and more particularly to a surface mount device, that includes a light shield for preventing light from entering therein. The invention is particularly useful for surface mount devices that are not fully encapsulated or for surface mount devices that have a resilient outer coating that is formed from a transparent material. In accordance with the present invention, the light shield is disposed between two passivation layers, and is formed by covering light sensitive portions of the integrated circuit die with a light barrier layer that is opaque to ambient light. By covering the light sensitive portions of the integrated ciruit, ambient light is prevented from adversely effecting the active regions of the circuit.
The invention relates, in one embodiment, to an integrated circuit package that includes a substrate (or wafer), a bonding pad and a light shield. The substrate has a substrate surface with active regions formed thereon. The active regions generally include light sensitive portions, which are adversely affected by ambient light. The bonding pads are disposed over the substrate surface to provide contacts for input signals, output signals, supply voltage, and ground. Furthermore, the light shield is disposed over a portion of the bonding pad and over a portion of the substrate surface. The light shield is formed from a light barrier layer that is opaque to ambient light. The purpose of the light shield is to block ambient light from reaching the active regions, and more particularly, to block ambient light from reaching the light sensitive portions, which are adversely affected by ambient light. In most configurations, the light shield is arranged to extend over an edge of the bonding pad to block light from entering therebetween.
In some embodiments, the light shield is formed from a non-conductive material. In other embodiments, the light shield is formed from a conductive material. In a related embodiment, the conductive light shield is electrically grounded to prevent the formation of an electrical potential on the light shield. In other embodiments, the light shield is electrically floating.
In another embodiment, the integrated circuit package includes a first passivation layer disposed between the light shield and the substrate surface and between the light shield and the bonding pad. In some embodiments, the first passivation layer is formed from a single layer. In other embodiments, the first passivation layer is formed from a combination of layers including a top layer and a bottom layer. By way of example, the bottom layer may be formed from a vapox over metal layer and the top layer may be formed from a nitride layer. In some embodiments, the light shield is disposed between the top layer and the bottom layer such that the bottom layer is disposed over the substrate surface and the bonding pad, and the top layer is disposed over the light shield. In a related embodiment, the light shield is arrange to extend over a side portion of the first passivation layer, or the bottom layer, to prevent light from entering through the sides of the passivation layer.
In another embodiment, the integrated circuit package includes a second passivation layer disposed over the light shield. As such, the light shield is disposed between the first and second pasivation layers. The second passivation layer, which acts as resilient prote
Beyer Weaver & Thomas LLP
Flynn Nathan J.
National Semiconductor Corporation
Quinto Kevin
LandOfFree
Light barrier for light sensitive semiconductor devices does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Light barrier for light sensitive semiconductor devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Light barrier for light sensitive semiconductor devices will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3157475