Level shifter with protective limit of voltage across terminals

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

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Details

327320, 327321, 326 68, 326 81, 361 90, H03K 190185

Patent

active

060548886

ABSTRACT:
A level shifter interfaces a digital system having devices designed for low operating voltages to an external system having higher operating voltages. The level shifter is comprised of two level shifting stages. Each level shifting stage includes a pull-up stack of a plurality of pull-up devices, coupled between a high power supply and a coupling node, which turn on when the coupling node is driven to a high shifted voltage, which is substantially the voltage at the high power supply, and which turn off when the coupling node is driven to a low shifted voltage, which is substantially the voltage at a low power supply. Each level shifting stage further includes a pull-down stack of a plurality of pull-down devices, coupled between the low power supply and the coupling node, which turn on when the coupling node is driven to the low shifted voltage and which turn off when the coupling node is driven to the high shifted voltage. Each level shifting stage further includes a clamping circuit, coupled to the coupling node and to a predetermined node of the plurality of pull-up and pull-down devices, for limiting voltage across terminals of each of the plurality of pull-up and pull-down devices by discharging down the predetermined node when the coupling node is driven to the low shifted voltage and by charging up the predetermined node when the coupling node is driven to the high shifted voltage. Thus, the level shifter shifts a lower core voltage range from the digital system to a higher shifted voltage range of the external system while limiting voltage across terminals of devices within the level shifter to prevent device breakdown and degradation.

REFERENCES:
patent: 5113087 (1992-05-01), Ueno
patent: 5300832 (1994-04-01), Rogers
patent: 5378943 (1995-01-01), Dennard
patent: 5805123 (1998-09-01), Satoh et al.
patent: 5864244 (1999-01-01), Kaplinsky
patent: 5892371 (1999-04-01), Maley
patent: 5969542 (1999-10-01), Maley et al.
Nakagome et al., "Circuit Techniques for 1.5-3.6-V Battery Operated 64-Mb DRAM", vol. 26, No. 7 IEEE, pp 1003-1009, 1991.

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