Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-06-14
2004-10-05
Hjerpe, Richard (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S100000, C349S042000, C326S063000, C327S333000
Reexamination Certificate
active
06801181
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a level shifter for converting an input voltage having a predetermined voltage width into an output voltage having a different voltage width, and more particularly to a level shifter for use in a gate line driver of an active matrix display apparatus.
2. Description of Related Art
FIG. 4
is a circuit diagram showing an example of a known level shifter which comprises a first p-channel transistor
51
; a second p-channel transistor
52
; a first n-channel transistor
54
; a second n-channel transistor
55
; a positive power supply
56
; and a negative power supply
57
.
The operation of the circuit shown in
FIG. 4
will be described. When an input signal Sig
1
is at a low level, an inverted input signal *Sig
1
obtained by inversion of the input signal Sig
1
is input to the gate of the first p-channel transistor
51
and the first p-channel transistor
51
turns OFF, whereas the second p-channel transistor
52
turns ON because of the input signal Sig
1
being input to the gate thereof. Because the positive power supply
56
is connected to an output terminal via the second p-channel transistor
52
, the a high level signal Sig
2
is output. Also, the positive power supply
56
is connected to the gate of the first n-channel transistor
54
via the second p-channel transistor
52
to turn the first n-channel transistor
54
ON. Through the first n-channel transistor
54
, the gate of the second n-channel transistor
55
is connected to the negative power supply
57
, and the second n-channel transistor
55
turns OFF.
When an input signal Sig
1
is at a high level, on the other hand, the first p-channel transistor
51
turns ON, whereas the second p-channel transistor
52
turns OFF. Accordingly, the second n-channel transistor
55
turns ON via the first p-channel transistor
51
, so that the output terminal is connected to the negative power supply
57
via the second n-channel transistor
55
, which causes the level of an output signal Sig
2
to be low. Further, the gate of the first n-channel transistor
54
is connected to the negative power supply
57
via the second n-channel transistor
55
, so that the first n-channel transistor
54
turns OFF.
In a conventional level shifter, a through current flows from the positive power supply
56
toward the negative power supply
57
when the level of an input signal Sig
1
changes from low to high, or from high to low, as will be described below. When an input signal Sig
1
is at a high level, the states of the respective transistors are as described above. Namely, the first p-channel transistor
51
is ON; the second p-channel transistor
52
is OFF; the first n-channel transistor
54
is OFF; and the second n-channel transistor
55
is ON. At this time, if the level of the input signal Sig
1
changes to low, the states of the transistors sequentially change in the following order:
1) First, the first p-channel transistor
51
turns OFF and the second p-channel transistor
52
turns ON.
2) Then, the gate of the first n-channel transistor
54
opens and the first n-channel transistor
54
turns ON.
3) Finally, charges accumulated in the gate of the second n-channel transistor
55
pass through the first n-channel transistor
54
to the negative power supply
57
, and the second n-channel transistor
55
turns OFF.
A certain amount of time is required to complete the above change.
Because both the second p-channel transistor
52
and the second n-channel transistor
55
maintain an ON state during the above change, a through current continuously flows from the positive power supply
56
to the negative power supply
57
. As a result, such through currents create a problem of high power consumption.
SUMMARY OF THE INVENTION
In a level shifter according to the present invention, a single input signal is input to gates of two transistors having different conductivity types, of three transistors connected in series. Accordingly, when the level of an input signal changes, either one of the two transistors which are connected in series necessarily turns OFF, thereby preventing a through current from flowing through the three transistors. As a result, power consumption of a level shifter can be reduced, which further results in an active matrix type display apparatus having a long battery life.
In particular, when an active layer of each transistor is configured of low temperature poly-silicon, the advantage of the present invention can be obtained regardless of mobility of the transistors, thereby achieving particularly notable effects.
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Hirosawa Koji
Komiya Naoaki
Matsumoto Shoichiro
Okuyama Masahiro
Cantor & Colburn LLP
Fatahi-yar M.
Hjerpe Richard
Sanyo Electric Co,. Ltd.
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