Level shifter circuit

Details Level shifter circuit Level shifter circuit

1974-08-09

1976-05-18

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307214, 307260, 307270, 307300, H03K 1700

Patent

active

039581365

ABSTRACT:
An improved TTL to MOS voltage level shifter circuit utilizes a totem pole output stage consisting of a pull-up junction transistor and a pull-down saturation junction transistor, an intermediate stage consisting essentially of a saturation junction transistor, an input stage consisting essentially of a diode and a saturation junction transistor, and current spike inhibit circuitry which consists essentially of a saturation junction transistor connected between the input stage and the base of the pull-down transistor. The current spike inhibit transistor, which turns on with the pull-down transistor, has a greater turnoff time than the pull-down transistor and consequently provides a relativley low impedance discharge path connected to the base of the pull-down transistor which allows the pull-down transistor to turn off before the pull-up transistor turns on. This helps insure against output current spikes that occur if the pull-up and pull-down transistors conduct simultaneously.

REFERENCES:
patent: 3364281 (1971-02-01), Tokunaso et al.
patent: 3789241 (1974-01-01), Hess, Jr.
patent: 3824408 (1974-07-01), Brunel

Affiliated with

Also associated with

Rating

Level shifter circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Level shifter circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Level shifter circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2238488