Level shifter circuit

Details Level shifter circuit Level shifter circuit

1992-04-29

1993-12-21

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307279, H03L 500

Patent

active

052723895

ABSTRACT:
A level shifter circuit includes first and second inverter circuits comprising first and second PMOS transistor and an NMOS transistor which are connected in series between a point of first potential V.sub.LC and a point of ground potential, connections interconnecting the output nodes of the respective ones of the inverter circuits to the gates of the second PMOS transistors of the respective other inverter circuits, an input signal circuit for providing to the inverter circuits respective input signals Sa, Sb which changes in a substantially complementary manner between a second potential V.sub.DD and ground potential, and a level setting circuit for forcibly setting the respective output nodes of the inverter circuits to the second potential V.sub.DD when a signal applied to said input signal circuit changes. The second potential V.sub.DD is equal to or less than the first potential V.sub.LC.

REFERENCES:
patent: 4039862 (1977-08-01), Dingwall et al.
patent: 4695744 (1987-09-01), Giordano
patent: 4703199 (1987-10-01), Ely
patent: 4845381 (1989-07-01), Cuevas
patent: 4982111 (1991-01-01), Nakaizumi
patent: 5136190 (1992-08-01), Chern et al.

Affiliated with

Also associated with

Rating

Level shifter circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Level shifter circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Level shifter circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-311058