Level shifted high impedance input multiplexor

Details Level shifted high impedance input multiplexor Level shifted high impedance input multiplexor

1995-09-27

1997-08-05

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Converging with plural inputs and single output

327215, 327 99, H03K 3037, H03K 17693

Patent

active

056546602

ABSTRACT:
A high input impedance CMOS multiplexor. A buffer stage is connected to common outputs of a plurality of N-channel multiplexor switches. A pull up P-channel transistor in this buffer is connected to a voltage source which is equal to the maximum voltage output from one of the plurality of N-channel multiplexor switches. As such, the buffer output can be fully shut off when a logic "1" is output by one of the multiplexor switches. The input impedance of the multiplexor is approximately the input impedance of the buffer or approximately 10.sup.14 ohms.

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