Level shift circuitry having delay boost

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Reexamination Certificate

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Details

C326S062000, C326S081000

Reexamination Certificate

active

06853234

ABSTRACT:
A level shift circuit that reduces PMOS to NMOS device contention whole decreasing output rise delays. The invention includes a device, comprising: a level shift circuit for shifting a signal at a first voltage at an input node to a second voltage at an output node; a boost circuit, driven by the second voltage, for decreasing a transition time of the signal between the first and second voltage; and a trigger circuit, coupled to an input of the boost circuit, for turning off the boost circuit when the signal at the output node reaches a predetermined voltage level.

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patent: 5-343980 (1993-12-01), None

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