Level shift circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Reexamination Certificate

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Details

C326S068000

Reexamination Certificate

active

07812660

ABSTRACT:
A level shift circuit prevents a through current in an output circuit connected to a high-voltage power supply, thereby reducing power consumption and noise and enabling a high-speed operation. The level shift circuit includes first and second bias generating circuits that supply a gate bias voltage to each of a PMOS transistor as a first transistor and a NMOS transistor as a second transistor. Each of the first and second bias voltage generating circuits includes a series connection of a diode-connected PMOS transistor and a diode-connected NMOS transistor. The discharge of a capacitor to the high-voltage power supply is prevented, and a through current is prevented when an output signal transitions from a high-level to a low-level and vice versa, whereby power consumption and noise can be reduced.

REFERENCES:
patent: 5493245 (1996-02-01), Kao et al.
patent: 6259299 (2001-07-01), Ryu
patent: 2003/0001616 (2003-01-01), Fujikawa et al.
patent: 2004/0160258 (2004-08-01), Tobita
patent: 2006/0125521 (2006-06-01), Kim
patent: 2009/0027100 (2009-01-01), Choi
patent: 11-68534 (1999-03-01), None
patent: 2002-251174 (2002-09-01), None
patent: 2004-72289 (2004-03-01), None
patent: 2007-208584 (2007-08-01), None

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